Programmable gain integrator stage including means for offset voltage elimination

Claim 2

An electronic amplifier comprising an operational amplifier (18;29) having an inverting input lead (70;270), a noninverting input lead connected to a reference voltage, and an output lead(191;170), said amplifier characterized by comprising : feedback means containing a passive element (19,30) connected between said inverting input lead and said output 'lead of said operational amplifier; an array (100;101) of N passive components (14-17;25-28) connected between said inverting input lead and an input terminal (11;371) and a plurality of switch means (15a-17a, 15b-17b; 26a-28a, 26b-28b) for selectively connecting between said inverting input lead (70;270) of said operational amplifier and said input terminal (11;371) desired ones of said N passive elements of said array; whereby the gain of the amplifier (110; 120) is determined by the value of said selected ones of said N components of said array.

Claim 3

Structure as in claim 1 further characterized in that said passive element (19;30) of said feedback means is a capacitor, and each of said N components (14-17; 25-28) of said array (100;101) are capacitors.

Claim 4

Structure as in claim 2 further characterized in that said capacitors (14-17; 25-28) of said array are binary weighted, wherein the capacitance value of each capacitor is equal to 2 C, where K is an integer ranging from 1 to N, and N is another integer equal to the number of passive elements in the array.

Claim 5

An electronic.gain-integrator stage comprising M operational gain stages (110,120) connected in series where M is a selected integer varying from 1 to K, where K is the maximum number of gain stages, said gain integrator stage characterized by comprising an operational amplifier integrator stage (130) containing an operational amplifier (38) having an inverting input lead, a noninverting input lead connected to a reference voltage, and an output lead; and means (39) for integrating the negative of the offset voltage (Voffl, Voff2) of said one or more gain stages (110,120) once for each integration of one sample of the input voltage, thereby to eliminate the effects of the inherent offset voltages of the operational amplifiers.

Claim 6

An electronic.gain-integrator stage comprising M operational gain stages (110,120) connected in series where M is a selected integer varying from 1 to K, where K is the maximum number of gain stages, said gain integrator stage characterized by comprising an operational amplifier integrator stage (130) containing an operational amplifier (38) having an inverting input lead, a noninverting input lead connected to a reference voltage, and an output lead; and means (39) for integrating the negative of the offset voltage (Voffl, Voff2) of said one or more gain stages (110,120) once for each integration of one sample of the input voltage, thereby to eliminate the effects of the inherent offset voltages of the operational amplifiers.

Claim 7

The structure as in claim 4 further characterized in that each said operational amplifier gain stage (110, 120) comprises : an operational amplifier (18,29) having - an inverting input lead (70,270), a noninverting input lead connected to a reference voltage, and an output lead (191,170) feedback means containing a passive element (19,30) connected between said inverting input lead and said output lead of said operational amplifier; an array (100,101) of N passive components (14-17, 25-28) connected between said inverting input lead and an input terminal (11,371), where N is a selected integer varying from I to J, where J is the maximum number of passive components; and a plurality of switch means (15a-17a, 15b-17b; 26a-28a, 26b-28b) for selectively connecting between said inverting input lead of said operational amplifier and said input terminal desired ones of said N passive elements of said array; whereby the gain of the amplifier is determined by the value of said selected ones of said N components of said array.

Claim 10

Structure as in claim 1 or 5 further characterized in that said array (100, 101) of N passive components (14-17, 25-28) comprises N capacitors and said passive element (19,30) in said feedback means comprises a capacitor.