Analog-to-digital converters

Claim 2

1 An analog-to-digital converter formed as an integrated circuit on one integrated circuit chip for converting an analog input voltage to a digital output of (m + n) bits, the converter comprising: a series resistor group formed of at least 2 m+n -1 resistors (R 0 , etc.); 2 m -1 voltage comparators (M 1 , etc.) for determining more significant bit data, each comprising bipolar transistors (Q m1 , etc.); a more significant bit encoder (ENCM). for encoding outputs from said more significant bit data determining voltage comparators (M 1 , etc.); 2 n -1 voltage comparators (N 1 , etc.) for determining less significant bit data, each comprising bipolar transistors (Q n1 , etc.); a less significant bit encoder (ENCN) for encoding outputs from said less significant bit data determining voltage comparators (N 1 , etc.); and 2m+n-1 switching element groups (A ij ), each formed of bipolar transistors and controlled in switching by control signals encoded based on the outputs of said more significant bit data determining voltage comparators (M 1 , etc.); said 2 m-1 more significant bit data determining voltage comparators (M 1 , etc.) being divided into two groups located on respective sides of said switching element groups (A..).

Claim 3

2 An analog-to-digital converter according to claim 1 wherein said series resistor group is formed in a zigzag pattern on said chip, and voltages to be compared in said more significant bit data determining voltage comparators (M 1 , etc.) are derived at turning points of said series resistor group.

Claim 4

3 An analog-to-digital converter according to claim 1 or claim 2 wherein the number of said more significant bit data determining voltage comparators (M 1 , etc.) is the same as that of said less significant bit data determining voltage comparators (N 1 , etc.).

Claim 5

4 An analog-to-digital converter for converting an analog input voltage to a digital output of m+n bits, the converter comprising: a resistor string (R 0 , etc.) formed on a semiconductor pellet in a zigzag pattern; 2 m+n -1 first voltage comparators (A..) formed along said resistor string (R 0 , etc.); 2 n -1 second voltage comparators (M 1 , etc.) formed at respective turning points of said resistor string (R 0 , etc.); 2 n- 1 third voltage comparators (N 1 , etc.) formed on said semiconductor pellet; and first and second encoders (ENCM, ENCN) formed on said semiconductor pellet; said resistor string (R 0 , etc.) producing (2 m+n -1)-step reference voltages, wherein when said (2 m+n -1)-step reference voltages are classified into (Z m -1) groups sequentially, a representative value of each of said groups and said analog input voltage are supplied to said second voltage comparators (M l' etc.), one of the outputs of a predetermined said voltage comparator and the other output of the next voltage comparator are added to each other, said added output is supplied to said first encoder (ENCM) so as to derive the more significant m bits of said digital output, said added output is supplied to said first voltage comparators (A..) so as to select a voltage comparator corresponding to a value of said more significant m bits from said first voltage comparators (A..), said selected voltage comparator compares each reference voltage of groups of reference voltages corresponding to the value of said more significant m bits with said analog input voltage and the compared outputs are supplied through said third voltage comparators (N 1 , etc.) to said second encoder (ENCN), from which n less significant bits of said digital output are derived.

Claim 6

4 An analog-to-digital converter for converting an analog input voltage to a digital output of m+n bits, the converter comprising: a resistor string (R 0 , etc.) formed on a semiconductor pellet in a zigzag pattern; 2 m+n -1 first voltage comparators (A..) formed along said resistor string (R 0 , etc.); 2 n -1 second voltage comparators (M 1 , etc.) formed at respective turning points of said resistor string (R 0 , etc.); 2 n- 1 third voltage comparators (N 1 , etc.) formed on said semiconductor pellet; and first and second encoders (ENCM, ENCN) formed on said semiconductor pellet; said resistor string (R 0 , etc.) producing (2 m+n -1)-step reference voltages, wherein when said (2 m+n -1)-step reference voltages are classified into (Z m -1) groups sequentially, a representative value of each of said groups and said analog input voltage are supplied to said second voltage comparators (M l' etc.), one of the outputs of a predetermined said voltage comparator and the other output of the next voltage comparator are added to each other, said added output is supplied to said first encoder (ENCM) so as to derive the more significant m bits of said digital output, said added output is supplied to said first voltage comparators (A..) so as to select a voltage comparator corresponding to a value of said more significant m bits from said first voltage comparators (A..), said selected voltage comparator compares each reference voltage of groups of reference voltages corresponding to the value of said more significant m bits with said analog input voltage and the compared outputs are supplied through said third voltage comparators (N 1 , etc.) to said second encoder (ENCN), from which n less significant bits of said digital output are derived.

Claim 7

5 An analog-to-digital converter according to claim 4 wherein said first, second and third voltage comparators (A ij , M 1 , N 1 , etc.) are respectively formed of bipolar transistors.

Claim 8

6 An analog-to-digital converter according to claim 4 wherein said second voltage comparators (M l , etc.) are divided into two groups and provided at positions corresponding to turning points of said resistor string on said semiconductor pellet.

Claim 9

7 An analog-to-digital converter according to claim 5 wherein said second voltage comparators (M 1 , etc.) function as a primary comparator of said third voltage comparators (N 1 , etc.).

Claim 10

8 An analog-to-digital converter according to claim 5 wherein said first to third voltage comparators (A ij , M 1 , N 1 , etc.) are respectively formed of differential transistor pairs.