EP0068832A2
Expired / Lapsed
EP
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Transistor-transistor logic circuits
Assignee: Fujitsu Ltd
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Filing: 1982-06-24
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Granted: —
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Expires: 2002-06-24
Abstract
Abstract A TTL fundamental logic circuit comprises an npn-type input transistor (Q1), an npn-type output transistor (02), and a pnp-type output transistor (Q3) whose emitter is connected to the collector of the npn-type output transistor, whose base is connected to the base of the npn-type output transistor and whose collector is grounded. The pnp-type output transistor (Q3) is turned on when the npn-type output transistor (Q2) is turned off, and thereby the potential of the high level output signal can be decreased and the propagation delay of the fundamental logic circuit reduced.
Inventors
- 👤 Osam Ohba
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-06 09:39
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/088
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
140 words
A transistor-transistor logic (TTL) circuit having an input transistor (Ql), of the npn-type, whose emitter is connected to an input point (IN1) of the circuit,and an output transistor (Q2), of the npn-type, whose base is connected to the collector of said input transistor, whose collector is connected to a higher-voltage power-supply point (V cc ) of the circuit through a load impedance (R3) and whose emitter is connected to a lower-voltage power-supply point of the circuit, the collector of said output transistor being connected also to an output point of the circuit, characterised in that the circuit further comprises an additional transistor (Q3), of the pnp-type, whose emitter is connected to the collector of said output transistor (Q2), whose base is connected to the base of said output transistor, and whose collector is connected to the said lower-voltage power-supply point.
Claim 2
Dependent Claim
140 words
A transistor-transistor logic (TTL) circuit having an input transistor (Ql), of the npn-type, whose emitter is connected to an input point (IN1) of the circuit,and an output transistor (Q2), of the npn-type, whose base is connected to the collector of said input transistor, whose collector is connected to a higher-voltage power-supply point (V cc ) of the circuit through a load impedance (R3) and whose emitter is connected to a lower-voltage power-supply point of the circuit, the collector of said output transistor being connected also to an output point of the circuit, characterised in that the circuit further comprises an additional transistor (Q3), of the pnp-type, whose emitter is connected to the collector of said output transistor (Q2), whose base is connected to the base of said output transistor, and whose collector is connected to the said lower-voltage power-supply point.
Claim 3
Dependent Claim
133 words
A transistor transistor logic (TTL) circuit having an input transistor, of the pnp-type, whose emitter is connected to an input point of the circuit, and an output transistor, of the pnp-type, whose base is connected to the collector of said input transistor, whose collector is connected to a lower-voltage power-supply point of the circuit through a load impedance and whose emitter is connected to a higher-voltage power-supply point of the circuit, the collector of said output transistor being connected also to an output point of the circuit, characterised in that the circuit further comprises an additional transistor, of the npn-type, whose emitter is connected to the collector of said output transistor, whose base is connected to the base of said output transistor, and whose collector is connected to the said higher--voltage power-supply point.
Claim 4
Dependent Claim
133 words
A transistor transistor logic (TTL) circuit having an input transistor, of the pnp-type, whose emitter is connected to an input point of the circuit, and an output transistor, of the pnp-type, whose base is connected to the collector of said input transistor, whose collector is connected to a lower-voltage power-supply point of the circuit through a load impedance and whose emitter is connected to a higher-voltage power-supply point of the circuit, the collector of said output transistor being connected also to an output point of the circuit, characterised in that the circuit further comprises an additional transistor, of the npn-type, whose emitter is connected to the collector of said output transistor, whose base is connected to the base of said output transistor, and whose collector is connected to the said higher--voltage power-supply point.
Claim 5
Dependent Claim
30 words
A TTL circuit as claimed in claim 1 or 2, wherein said output transistor is a transistor having a Schottky barrier diode connected between the base and the collector thereof.
Claim 6
Dependent Claim
19 words
A TTL circuit as claimed in claim 1, 2 or 3, wherein said input transistor is a multi-emitter-type transistor.
Claim 7
Dependent Claim
46 words
A TTL circuit as claimed in any preceding claim, wherein said input transistor and said additional transistor are formed in a region surrounded by an isolation region, and the collector electrode of said input transistor and the base electrode of said additional transistor are integrally formed.
Claim 8
Dependent Claim
22 words
A TTL circuit as claimed in claim 5, wherein the collector electrode of said additional transistor is formed in said isolation region.
Claim 9
Dependent Claim
31 words
A TTL circuit as claimed in claim 5 or 6, wherein the collector electrode of said additional transistor is formed so as to surround said emitter electrode of the same transistor.
Claim 10
Dependent Claim
25 words
An integrated semiconductor circuit, including a plurality of interconnected fundamental logic circuits, each of which is a TTL circuit as claimed in any preceding claim.
References Cited (Backward Citations)
No citation records indexed.
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