EP0068678A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Comparator circuit and method
Assignee: Nortel Networks Ltd
•
Filing: 1982-06-09
•
Granted: —
•
Expires: 2002-06-09
Abstract
Abstract A magnitude comparator circuit is provided for determining the largest binary number, out of a plurality of binary numbers received bit-serially, in parallel. A latch is used to store the results of the comparison and is initialized to an all logic 0 state. The latch has a unique one-bit location corresponding to each number being compared, and a logic 0 stored in the latch indicates that the number corresponding thereto is still in contention (i.e remains a candidate) for being the largest, and a logic 1 indicates it has been eliminated from contention. As the numbers are received bit by bit (most significant bits first) the bits are applied to gating circuits, one for each number, which invert the bits and store the inverted result in the latch. The exceptions to this are twofold; a) when a number has already been eliminated from contention, as indicated by a logic 1 stored in the latch corresponding to that number, it remains a logic 1; and b) when the remaining candidates all have a binary 0 in an equal significant bit location no choice is of course possible and the aforestated inversion does not take place and the contents of the latch are simply recycled.
Inventors
- 👤 Ernst August Munter
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-31 09:57
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/02; G06F7/026
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
171 words
A circuit (10) for determining which serially received binary number, out of a plurality of binary numbers received bit-serially in parallel, has the largest magnitude, said circuit comprising: a storage means (17) having at least a one bit location corresponding to each said binary number; and gating means, (11) for each said number, for storing in a respective one of said locations in said storage means (17), in response to each bit of said number, a) the previous logic state stored in said location if said bit is a binary 1, or b) a first logic state if said bit is a binary 0 and is associated with a remaining candidate and the corresponding bits of the remaining candidates are also binary 0's, or c) a second logic state if said bit is a binary 0 and either i) said bit is not associated with a remaining candidate, or ii) said bit is associated with a remaining candidate but the corresponding bits of the remaining candidates are not all binary 0's.
Claim 2
Dependent Claim
171 words
A circuit (10) for determining which serially received binary number, out of a plurality of binary numbers received bit-serially in parallel, has the largest magnitude, said circuit comprising: a storage means (17) having at least a one bit location corresponding to each said binary number; and gating means, (11) for each said number, for storing in a respective one of said locations in said storage means (17), in response to each bit of said number, a) the previous logic state stored in said location if said bit is a binary 1, or b) a first logic state if said bit is a binary 0 and is associated with a remaining candidate and the corresponding bits of the remaining candidates are also binary 0's, or c) a second logic state if said bit is a binary 0 and either i) said bit is not associated with a remaining candidate, or ii) said bit is associated with a remaining candidate but the corresponding bits of the remaining candidates are not all binary 0's.
Claim 3
Dependent Claim
24 words
The circuit of claim 1 wherein the first logic state is a logic 0 and wherein the second logic state is a logic 1.
Claim 4
Dependent Claim
17 words
The circuit of claim 1 or 2 wherein said numbers are received in order of declining significance.
Claim 5
Dependent Claim
23 words
The circuit of claim 1 or 2 wherein said storage means (17) is a plurality of flip-flops, one flip-flop for each said number.
Claim 6
Dependent Claim
34 words
The circuit of claim 1 or 2 wherein said binary numbers are coded such that a binary 0 is represented by a logic 0 and a binary 1 is represented by a logic 1.
Claim 7
Dependent Claim
144 words
A circuit (10) for determining which serially received binary number, out of a plurality of binary numbers, received bit-serially in parallel, has the largest magnitude, said circuit (10) comprising: a storage means (17) having a one bit location corresponding to each said binary number; and a plurality of gating means (lla, llb, llc, lld, lle), one for each said number, each said gating means responsive to the bits of one said number, bit by bit, in order of declining significance, said gating ! means inverting each bit received and applying it to said location in said storage means (17), unless all equal significant bits of remaining candidates are binary 0's in which case the bit is applied to said location without inversion, or unless a previous output of said gating means was a logic 1, in which case the output remains a logic 1.
Claim 8
Dependent Claim
144 words
A circuit (10) for determining which serially received binary number, out of a plurality of binary numbers, received bit-serially in parallel, has the largest magnitude, said circuit (10) comprising: a storage means (17) having a one bit location corresponding to each said binary number; and a plurality of gating means (lla, llb, llc, lld, lle), one for each said number, each said gating means responsive to the bits of one said number, bit by bit, in order of declining significance, said gating ! means inverting each bit received and applying it to said location in said storage means (17), unless all equal significant bits of remaining candidates are binary 0's in which case the bit is applied to said location without inversion, or unless a previous output of said gating means was a logic 1, in which case the output remains a logic 1.
Claim 9
Dependent Claim
32 words
The circuit of claim 6 wherein said binary number is coded such that a binary 0 is represented by a logic 0 and a binary 1 is represented by a logic 1.
Claim 10
Independent Claim
134 words
A method for determining which serially received binary number, out of a plurality of binary numbers, received bit-serially in parallel, has the largest magnitude, said method comprising the steps of: a) for each said number, receiving the bits from said number, one bit at a tine, in declining order of significance; b) sequentially inverting each said bit and storing the result in a storage means such that a logic 0 indicates that the corresponding number remains a candidate for being the largest and a logic 1 indicates it has been eliminated, unless i) all the equal significant bits of the remaining candidates are all binary 0, in which case the inverting step is omitted, or ii) a logic 1 was previously stored in the memory means in which case it remains a logic 1.
Claim 11
Independent Claim
134 words
A method for determining which serially received binary number, out of a plurality of binary numbers, received bit-serially in parallel, has the largest magnitude, said method comprising the steps of: a) for each said number, receiving the bits from said number, one bit at a tine, in declining order of significance; b) sequentially inverting each said bit and storing the result in a storage means such that a logic 0 indicates that the corresponding number remains a candidate for being the largest and a logic 1 indicates it has been eliminated, unless i) all the equal significant bits of the remaining candidates are all binary 0, in which case the inverting step is omitted, or ii) a logic 1 was previously stored in the memory means in which case it remains a logic 1.
Claim 12
Dependent Claim
32 words
The method of claim 8 wherein said binary number is coded such that a binary 0 is represented by a logic 0 and a binary 1 is represented by a logic 1.
Claim 13
Dependent Claim
148 words
A circuit for ranking, in order of magnitude, a plurality M of N binary numbers received bit-serially in parallel, wherein N and M are positive integers, and M ≤ N, said circuit comprising: N first storage means (56) for storing said N numbers, one number per storage means; comparator means (10), responsive to said storage means, for determining which number, out of the plurality of numbers applied to it, is the largest; M second storage means (51, 52, 53, 54), serially connected, and responsive to the output of said comparator means (10), for storing the results therefrom; N gating means (50), one for each said number, responsive to said second storage means (51, 52, 53, 54), for selectively inhibiting the application of said numbers from said first storage means (56) to said comparator means, once said number has been selected as being the largest by said comparator means.
Claim 14
Dependent Claim
148 words
A circuit for ranking, in order of magnitude, a plurality M of N binary numbers received bit-serially in parallel, wherein N and M are positive integers, and M ≤ N, said circuit comprising: N first storage means (56) for storing said N numbers, one number per storage means; comparator means (10), responsive to said storage means, for determining which number, out of the plurality of numbers applied to it, is the largest; M second storage means (51, 52, 53, 54), serially connected, and responsive to the output of said comparator means (10), for storing the results therefrom; N gating means (50), one for each said number, responsive to said second storage means (51, 52, 53, 54), for selectively inhibiting the application of said numbers from said first storage means (56) to said comparator means, once said number has been selected as being the largest by said comparator means.
Claim 15
Dependent Claim
11 words
The circuit of claim 10 wherein N = M = 5.
Claim 16
Independent Claim
90 words
A method for ranking, in order of magnitude, a plurality N of binary numbers received in parallel, wherein N is a positive integer, said method comprising the steps of: a) comparing said N binary numbers and determining which one is the largest; b) eliminating from contention all numbers previously chosen as being the largest and determining the largest of the remaining numbers; and c) repeating step (b) until (N-1) numbers have been eliminated from contention, such that the order in which a number is so eliminated is its rank order.
Claim 17
Independent Claim
90 words
A method for ranking, in order of magnitude, a plurality N of binary numbers received in parallel, wherein N is a positive integer, said method comprising the steps of: a) comparing said N binary numbers and determining which one is the largest; b) eliminating from contention all numbers previously chosen as being the largest and determining the largest of the remaining numbers; and c) repeating step (b) until (N-1) numbers have been eliminated from contention, such that the order in which a number is so eliminated is its rank order.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.