EP0067475A2
Expired / Lapsed
EP
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Insulated gate field effect transistor and its manufacture
Assignee: Philips Electronics UK Ltd
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Filing: 1982-06-02
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Granted: —
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Expires: 2002-06-02
Abstract
Abstract A polycrystalline semiconductor layer (9) is provided on an insulating layer (4) at the surface (19) of an n-type semiconductor body (1) and the gate of the IGFET comprises strips (9a, 9b) which are formed by laterally diffusing a p-type impurity into layer (9) below edges (10a, 10b) of masking layer (8). P-type zone (13) and the n-type source (12) are formed by introducing the relevant impurities in the presence of masking layer (8) and then by laterally diffusing these impurities below the gate, zone (13) diffusing laterally further than source (12). Thus the lateral extent of zone (12), source (13) and gate (9a, 9b) can all be predetermined in relation to the same edge of masking layer (8) allowing improved gate-channel alignment and so minimizing Miller capacitance of the IGFET.
Inventors
- 👤 David James Coe
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 05:57
CPC Classifications
H; H10; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/66; H10D30/01; H10D30/021; H10D30/028; H10D30/0291; H10D30/662; H10D62/00; H10D62/10; H10D62/17; H10D62/393; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/021; H10W10/061; H10W10/10; H10W10/13; H10W10/181; H10W10/20; H10D62/13; H10D62/149; H10D62/151; H10D62/156; H10D62/157; H10D64/519
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
204 words
A method of manufacturing an insulated gate field effect transistor comprising a semiconductor body and having source and drain zones respectively adjoining opposite major surfaces of said body, the method including the steps of providing a layer of polycrystalline semiconductor material on an insulating layer which is present on a first conductivity type region of the body, forming a masking layer on said polycrystalline layer, removing unmasked parts of the polycrystalline layer, the gate of the transistor being formed from the masked part of the polycrystalline layer, introducing into said region impurities characteristic of the first and second conductivity types to form the source zone and a zone of the second conductivity type, and laterally diffusing the impurity characteristic of the second conductivity type below the masked part of the polycrystalline layer to a predetermined distance from an edge of the masking layer, characterized in that the polycrystalline layer initially has a relatively high resistivity and the gate comprises a relatively low resistivity conductive strip of the polycrystalline layer, which strip is defined by laterally diffusing a doping element into the masked part of the polycrystalline layer, the doping element being diffused laterally to a predetermined distance from said edge of the masking layer.
Claim 2
Independent Claim
204 words
A method of manufacturing an insulated gate field effect transistor comprising a semiconductor body and having source and drain zones respectively adjoining opposite major surfaces of said body, the method including the steps of providing a layer of polycrystalline semiconductor material on an insulating layer which is present on a first conductivity type region of the body, forming a masking layer on said polycrystalline layer, removing unmasked parts of the polycrystalline layer, the gate of the transistor being formed from the masked part of the polycrystalline layer, introducing into said region impurities characteristic of the first and second conductivity types to form the source zone and a zone of the second conductivity type, and laterally diffusing the impurity characteristic of the second conductivity type below the masked part of the polycrystalline layer to a predetermined distance from an edge of the masking layer, characterized in that the polycrystalline layer initially has a relatively high resistivity and the gate comprises a relatively low resistivity conductive strip of the polycrystalline layer, which strip is defined by laterally diffusing a doping element into the masked part of the polycrystalline layer, the doping element being diffused laterally to a predetermined distance from said edge of the masking layer.
Claim 3
Dependent Claim
70 words
A method as claimed in Claim 1, characterized in that unmasked parts of the polycrystalline layer are removed such that adjacent the edge of the masking layer an edge of the polycrystalline layer is exposed substantially throughout the thickness of the polycrystalline layer, the conductive strip being defined by laterally diffusing a doping element into the masked part of the polycrystalline layer via the exposed edge of the polycrystalline layer.
Claim 4
Dependent Claim
39 words
A method as claimed in Claim 1 or Claim 2, characterized in that the masking layer is removed and the polycrystalline layer is subjected to a selective etching treatment to remove the undiffused portion and leave the conductive strip.
Claim 5
Dependent Claim
32 words
A method as claimed in Claim 3, characterized in that an impurity characteristic of the first conductivity type is introduced into the semiconductor region at areas not masked by the conductive strip.
Claim 6
Dependent Claim
43 words
A method as claimed in Claim 3 or Claim 4, characterized in that the impurity characteristic of the first conductivity type is introduced into the semiconductor body to form the source zone of the first conductivity type prior to removing the masking layer.
Claim 7
Dependent Claim
58 words
A method as claimed in Claim 5, characterized in that the impurity of the source zone is diffused laterally below the remaining portion of the polycrystalline layer to a predetermined distance from the edge of the masking layer such that the impurity characteristic of the second conductivity type diffuses laterally further than the impurity of the source zone.
Claim 8
Independent Claim
42 words
A method as claimed in any of the preceding Claims, characterized in that the doping element of the conductive strip diffuses laterally into the polycrystalline layer further than the impurity characteristic of the second conductivity type diffuses laterally below the polycrystalline layer.
Claim 9
Independent Claim
72 words
A method as claimed in any of Claims 4 to 6, characterized in that the impurity characteristic of the second conductivity type diffuses laterally below the polycrystalline layer further than the doping element of the conductive strip diffuses into the polycrystalline layer, and in that the concentration of impurity introduced into areas not masked by the conductive strip is greater than the concentration of the impurity characteristic of the second conductivity type.
Claim 10
Independent Claim
40 words
A method as claimed in any of the preceding Claims, characterized in that the second conductivity type zone adjoins a deeper zone of the second conductivity type, which deeper zone is laterally spaced apart from the gate of the transistor.
Claim 11
Independent Claim
39 words
A method as claimed in any of the preceding Claims, characterized in that an electrode which contacts the source zone extends on an insulating layer on the side of the second conductivity type zone remote from said source zone.
Claim 12
Independent Claim
43 words
A method as claimed in any of the preceding Claims, characterized in that the gate comprises a plurality of conductive strips, the method further including the step of forming from the polycrystalline layer a relatively low resistivity bar which electrically connects adjacent strips.
Claim 13
Independent Claim
31 words
A method as claimed in any of the preceding Claims, characterized in that the first conductivity type region is provided on a more highly doped region of the first conductivity type.
Claim 14
Dependent Claim
17 words
An insulated gate field effect transistor manufactured by a method claimed in any of the preceding Claims.
References Cited (Backward Citations)
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