Self-aligned lateral transistor and method of manufacture thereof

Claim 1

A method for manufacturing a transistor having a base, an emitter, and a collector characterized by the steps of: providing a body of semiconductor material having an impurity region of a first conductivity type therein adjacent to an electrically insulating layer along an upper surface of the body; forming a protective layer over the insulating layer; forming an open space through the protective layer above a first region in the body intended for a first doped region of a second conductivity type opposite to the first conductivity type, at least a portion of the first region being coincident with a portion of the impurity region, the open space defining an edge of the remainder of the protective layer nearest to a second region in the body spaced apart from the first region and intended for a second doped region of the second- conductivity type, at least a portion of the second region being coincident with a portion of the impurity region; introducing a first semiconductor dopant of the second conductivity type through the open space into the body to form the first doped region; etching the insulating layer through the open space back under the remainder of the protective layer laterally at least toward the second region to define an open space through the insulating layer; oxidizing adjacent portions, along the insulating layer, of the first doped region and the impurity region outside the first doped region to create an electrically insulating region which includes therein the insulating layer, thereby to leave a remaining impurity region comprising the non-oxidized portion of the impurity region still of the first conductivity type and likewise to leave a remaining first doped region comprising the non-oxidized portion of the first doped region, the insulating region having a minimum thickness at a point above the second region; removing at least a portion of the remainder of the protective layer above the second region; forming an open space through the insulating region above the second region; and introducing a second semiconductor dopant of the second conductivity type through the open space in the insulating region into the body to form the second doped region; whereby the base comprises the remaining impurity region excluding the second doped region, the emitter comprises one of the second doped region and the remaining first doped region, and the collector comprises the other of the second doped region and the remaining first doped region.

Claim 2

A method for manufacturing a transistor having a base, an emitter, and a collector characterized by the steps of: providing a body of semiconductor material having an impurity region of a first conductivity type therein adjacent to an electrically insulating layer along an upper surface of the body; forming a protective layer over the insulating layer; forming an open space through the protective layer above a first region in the body intended for a first doped region of a second conductivity type opposite to the first conductivity type, at least a portion of the first region being coincident with a portion of the impurity region, the open space defining an edge of the remainder of the protective layer nearest to a second region in the body spaced apart from the first region and intended for a second doped region of the second- conductivity type, at least a portion of the second region being coincident with a portion of the impurity region; introducing a first semiconductor dopant of the second conductivity type through the open space into the body to form the first doped region; etching the insulating layer through the open space back under the remainder of the protective layer laterally at least toward the second region to define an open space through the insulating layer; oxidizing adjacent portions, along the insulating layer, of the first doped region and the impurity region outside the first doped region to create an electrically insulating region which includes therein the insulating layer, thereby to leave a remaining impurity region comprising the non-oxidized portion of the impurity region still of the first conductivity type and likewise to leave a remaining first doped region comprising the non-oxidized portion of the first doped region, the insulating region having a minimum thickness at a point above the second region; removing at least a portion of the remainder of the protective layer above the second region; forming an open space through the insulating region above the second region; and introducing a second semiconductor dopant of the second conductivity type through the open space in the insulating region into the body to form the second doped region; whereby the base comprises the remaining impurity region excluding the second doped region, the emitter comprises one of the second doped region and the remaining first doped region, and the collector comprises the other of the second doped region and the remaining first doped region.

Claim 6

A method as in any one of Claims 1-4 further characterized by including, before the step of introducing a first semiconductor dopant, the step of etching the insulating layer through the open space down to semiconductor material of the body.

Claim 7

A method as in any one of Claims 1-5 characterized in that the step of introducing a first semiconductor dopant comprises ion implanting the first dopant using the edge of the remainder of the protective layer to control the lateral extent of the first doped region toward the second region, the remainder of the protective layer substantially preventing the first dopant from being ion implanted elsewhere into the body.

Claim 9

A method as in any one of Claims 1-7 characterized in that the remainder of the protective layer substantially prevents the insulating layer from being etched elsewhere during the step of etching.

Claim 11

A method as in any one of Claims 1-9 characterized in that the step of oxidizing comprises exposing the adjacent portions through the aperture and the hole to a selected oxidizing environment, the remainder of the protective layer substantially preventing the remaining impurity region from being oxidized.

Claim 12

A method as in any one of Claims 1-10 characterized in that the step of removing comprises removing the entire remainder of the protective layer.

Claim 20

A method for forming a pair of regions of a selected conductivity type spaced apart from each other in a body of semiconductor material containing a semiconductor region therein adjacent to an electrically insulating layer along an upper surface of the body, the method being characterized by the steps of: depositing a protective layer on the insulating layer; forming an open space through the protective layer above a first region in the body intended for a first doped region of the selected conductivity type so as to define a right-hand edge of the remainder of the protective layer, at least a portion of the first region being coincident with a portion of the semiconductor region, a second region in the body intended for a second doped region of the second conductivity type being located laterally to the left of the first region, and at least a portion of the second region being coincident with a portion of the semiconductor region; introducing a first semiconductor dopant of the second conductivity type through the open space into the body; etching the insulating layer through the open space back under the remainder of the protective layer a selected lateral distance from the right-hand edge leftward toward the second region; simultaneously diffusing the first dopant downward and sideward to form the first doped region and oxidizing adjacent portions, along the upper surface, of the first doped region and the semiconductor region outside the first doped region to define an electrically insulating region including the the insulating layer therein, thereby to leave a remaining first doped region comprising the non-oxidized portion of the first doped region, the remaining first doped region having a left-hand boundary determinable from the right-hand edge and the insulating region having a minimum thickness at a point above the second region; removing at least a portion of the remainder of the protective layer above the second region; etching the insulating region for a sufficient time to form an open space therethrough so as to define a left-hand edge of the remainder of the insulating region determinable from the selected lateral distance; introducing a second semiconductor dopant of the selected conductivity type through the open space in the insulating region into the body to form the second doped region, the second doped region having a right-hand boundary determinable from the left-hand edge and spaced apart to the left of the left-hand boundary.

Claim 21

A method for forming a pair of regions of a selected conductivity type spaced apart from each other in a body of semiconductor material containing a semiconductor region therein adjacent to an electrically insulating layer along an upper surface of the body, the method being characterized by the steps of: depositing a protective layer on the insulating layer; forming an open space through the protective layer above a first region in the body intended for a first doped region of the selected conductivity type so as to define a right-hand edge of the remainder of the protective layer, at least a portion of the first region being coincident with a portion of the semiconductor region, a second region in the body intended for a second doped region of the second conductivity type being located laterally to the left of the first region, and at least a portion of the second region being coincident with a portion of the semiconductor region; introducing a first semiconductor dopant of the second conductivity type through the open space into the body; etching the insulating layer through the open space back under the remainder of the protective layer a selected lateral distance from the right-hand edge leftward toward the second region; simultaneously diffusing the first dopant downward and sideward to form the first doped region and oxidizing adjacent portions, along the upper surface, of the first doped region and the semiconductor region outside the first doped region to define an electrically insulating region including the the insulating layer therein, thereby to leave a remaining first doped region comprising the non-oxidized portion of the first doped region, the remaining first doped region having a left-hand boundary determinable from the right-hand edge and the insulating region having a minimum thickness at a point above the second region; removing at least a portion of the remainder of the protective layer above the second region; etching the insulating region for a sufficient time to form an open space therethrough so as to define a left-hand edge of the remainder of the insulating region determinable from the selected lateral distance; introducing a second semiconductor dopant of the selected conductivity type through the open space in the insulating region into the body to form the second doped region, the second doped region having a right-hand boundary determinable from the left-hand edge and spaced apart to the left of the left-hand boundary.

Claim 28

A method for forming a doped region of a selected conductivity type in an active semiconductor region of a body of silicon semiconductor material having an annular electrically insulating region of silicon dioxide extending from a surface of the body partially into it so as to at least partially enclose the active region laterally, the method characterized by the steps of: forming a protective layer of a selected thickness of silicon nitride over the surface; forming an open space through a portion of the protective layer over the active region; and propelling ions of a chemical species of the selected conductivity type toward the protective layer including toward the open space at an energy level insufficient for the ions to pass through the selected thickness of silicon nitride, ions passing through the open space entering the body to form the doped region and ions not entering the open space substantially being prevented by the protective layer from entering the body.

Claim 29

A method for forming a doped region of a selected conductivity type in an active semiconductor region of a body of silicon semiconductor material having an annular electrically insulating region of silicon dioxide extending from a surface of the body partially into it so as to at least partially enclose the active region laterally, the method characterized by the steps of: forming a protective layer of a selected thickness of silicon nitride over the surface; forming an open space through a portion of the protective layer over the active region; and propelling ions of a chemical species of the selected conductivity type toward the protective layer including toward the open space at an energy level insufficient for the ions to pass through the selected thickness of silicon nitride, ions passing through the open space entering the body to form the doped region and ions not entering the open space substantially being prevented by the protective layer from entering the body.

Claim 32

A method as in claims 25, 26, or 27 characterized by, before the step of forming an open space, the steps of: forming an insulating layer of silicon dioxide on the protective layer; and forming an open space through the insulating layer generally aligned with the intended location for the open space in the protective layer.