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EP0064829A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

High electron mobility semiconductor device and process for producing the same

Assignee: Fujitsu Ltd
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Filing: 1982-04-23
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Granted: —
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Expires: 2002-04-23
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Abstract

Abstract A high-electron mobility transistor (HEMT) has an undoped GaAs layer (2); and an N-doped AlGaAs layer (3); a heterojunction (12) formed between the undoped GaAs layer and N-doped AlGaAs layer (2) and (3), respectively; a gate electrode (10) on the N-doped AlGaAs layer (3); and an electron-storing layer formed in proximity to the heterojunction (12) due to the difference in electron affinity between the undoped GaAs layer (2) and the N-doped AlGaAs layer (3). The known HEMT has a disadvantage in that during the formation of the source and drain regions by means of, for example thermal diffusion, the impurities of the N-doped AlGaAs layer (3) may diffuse into the undoped GaAs layer (2) through the heterojunction (12) so that the mobility of the electrons in the electron-storing layer (17) is lessened. This disadvantage is removed in the present invention by the provision of a conduction layer (7) formed by the epitaxial growth of highly-doped GaAs. The known HEMT also has a disadvantage in that the source electrode (9A) or the drain electrode (9B) is electrically connected to the N-doped AlGaAs layer (3) so that the electrons in this layer (3) may lessen said mobility. This disadvantage is also eliminated in the present invention by the provision of an insulating layer (6).

Inventors

  • 👤 Takashi Mimura
  • 👤 Satoshi Hiyamizu

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-08 20:35
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/113; H10D62/115; H10D62/116; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/472; H10D30/475; H10D30/4755; H10D30/80

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 129 words
A semiconductor device having: a first single crystalline semiconductor layer(2); a second single crystalline semiconductor layer (3) having an electron affinity different from that of the first single crystalline semiconductor layer; a heterojunction (12) formed between said first and second single crystalline semiconductor layers; a gate electrode (10) on one of the said first and second single crystalline semiconductor layers (2 or 3); an electron-storing layer for forming a conduction channel, formed in proximity to the heterojunction (12) due to the difference-in electron affinity; and characterized by a conduction layer (7) composed of highly-doped and epitaxially grown semiconductor material.in contact with the heterojunction (12); and an electrode (9A, 9B) electrically connected to the conduction channel via the conduction layer (7), said electrode being formed on said conduction layer (7).
Claim 2
Dependent Claim 129 words
A semiconductor device having: a first single crystalline semiconductor layer(2); a second single crystalline semiconductor layer (3) having an electron affinity different from that of the first single crystalline semiconductor layer; a heterojunction (12) formed between said first and second single crystalline semiconductor layers; a gate electrode (10) on one of the said first and second single crystalline semiconductor layers (2 or 3); an electron-storing layer for forming a conduction channel, formed in proximity to the heterojunction (12) due to the difference-in electron affinity; and characterized by a conduction layer (7) composed of highly-doped and epitaxially grown semiconductor material.in contact with the heterojunction (12); and an electrode (9A, 9B) electrically connected to the conduction channel via the conduction layer (7), said electrode being formed on said conduction layer (7).
Claim 3
Dependent Claim 35 words
A semiconductor device according to claim 1, wherein said first single crystalline semiconductor layer (2) is mainly composed of GaAs and said second single crystalline semiconductor layer (3) is mainly composed of Al G aAs.
Claim 4
Dependent Claim 29 words
A semiconductor device according to claim 1 or 2, wherein said conduction layer (7) is mainly composed of one member selected from the group consisting of GaAs and Ge.
Claim 5
Dependent Claim 87 words
A semiconductor device according to claim 1, 2 or 3, wherein said second single crystalline semiconductor layer (3) is doped with N-type conductivity impurities and has a lower electron affinity than that of said first single crystalline semiconductor layer (2), and between said conduction layer (7) and one of the first and second single crystalline semiconductor layers (3, fig 3; 2, fig. 4) is interposed an insulating layer (6) which is composed of the oxide or nitride of the said one layer ( 3 , 2 ),
Claim 6
Dependent Claim 21 words
A semiconductor device according to claim 4, wherein said insulating layer (6) is mainly composed of aluminum oxide or aluminum nitride.
Claim 7
Dependent Claim 38 words
A semiconductor device according to any one of claims 1 through 5, wherein said conduction layer (7) protrudes through one of the said single crystalline semiconductor layers (2, 3) until it reaches the level of said heterojunction (12).
Claim 8
Dependent Claim 212 words
A process for producing a semiconductor device having: a first single crystalline semiconductor layer (2) a second single crystalline semiconductor layer (3) having an electron affinity different from that of the first single crystalline semiconductor layer; a heterojunction (12) formed between said first and second single crystalline semiconductor layers (2, 3); a gate electrode (10) on one of the said first and second single crystalline semiconductor layers (2 or 3); an electron-storing layer for forming a conduction channel, formed in proximity to the hetero- junction due to the difference in electron affinity; characterized in that said process comprises the steps of: selectively removing either of or both of the first and second single crystalline semiconductor layers (2 and 3, respectively) after their formation, so as to expose an end (12A) of the heterojunction (12); epitaxially growing a highly-doped semiconductor material where the end of the heterojunction (12) is exposed after either of or both of the first and.second single crystalline layers (2 and 3, respectively) are selectively removed, so as to form a conduction layer (7) which is in contact with said exposed hetero-junction (12) at the end (12A) thereof; and forming on the conduction layer (7) an electrode (9A, 9B) electrically connected to the conduction channel via the conduction layer (7).
Claim 9
Dependent Claim 212 words
A process for producing a semiconductor device having: a first single crystalline semiconductor layer (2) a second single crystalline semiconductor layer (3) having an electron affinity different from that of the first single crystalline semiconductor layer; a heterojunction (12) formed between said first and second single crystalline semiconductor layers (2, 3); a gate electrode (10) on one of the said first and second single crystalline semiconductor layers (2 or 3); an electron-storing layer for forming a conduction channel, formed in proximity to the hetero- junction due to the difference in electron affinity; characterized in that said process comprises the steps of: selectively removing either of or both of the first and second single crystalline semiconductor layers (2 and 3, respectively) after their formation, so as to expose an end (12A) of the heterojunction (12); epitaxially growing a highly-doped semiconductor material where the end of the heterojunction (12) is exposed after either of or both of the first and.second single crystalline layers (2 and 3, respectively) are selectively removed, so as to form a conduction layer (7) which is in contact with said exposed hetero-junction (12) at the end (12A) thereof; and forming on the conduction layer (7) an electrode (9A, 9B) electrically connected to the conduction channel via the conduction layer (7).
Claim 10
Dependent Claim 37 words
A process for producing a semiconductor device according to claim 7, wherein said first single crystalline semiconductor layer (2) is mainly composed of GaAs and said second single crystalline semiconductor layer (3) is mainly composed of AlGaAs.
Claim 11
Dependent Claim 28 words
A process according to claim 7 or 8, wherein said conduction layer (7) is mainly composed of one member selected from the group consisting of GaAs and Ge.
Claim 12
Dependent Claim 75 words
A process according to any one of claims 7 through 9, wherein the end (12A) of said heterojunction (12) is exposed by the selective removal of said second single crystalline semiconductor layer (3), and subsequent to said selective removal an insulating layer (6) consisting of oxide or nitride is formed on the exposed surface of said second single crystalline semiconductor layer (3); thereafter said step of epitaxially growing a highly-doped semiconductor material is carried out.
Claim 13
Dependent Claim 193 words
A process for producing a semiconductor device having: a first single crystalline semiconductor layer (2); a second single crystalline semiconductor layer (3) having an electron affinity different from that of the first single crystalline semiconductor layer; a heterojunction (12) formed between said first and second single crystalline semiconductor layers(2, 3); a gate electrode (10) on one of the said first and second single crystalline semiconductor layers (2 or 3); and an electron-storing layer for forming a conduction channel, formed in proximity to the hetero- junction due to the difference in electron affinity; characterized in that the first single crystalline semiconductor layer (2) is formed on a semi-insulating substrate (1, Figure 11), the said substrate having at least one lug (lA) positioned below a corresponding gate electrode (10); and in that a conduction layer (7) is formed on the second single crystalline semiconductor layer (3); the height of the lug (lA) exceeding the thickness of the second single crystalline semiconductor layer (3) so that the ends of the heterojunction (12, Figure 13) contact portions of the conduction layer (7); the said portions of the conduction layer (7) having further electrodes (9A, 9B) formed thereon.
Claim 14
Dependent Claim 193 words
A process for producing a semiconductor device having: a first single crystalline semiconductor layer (2); a second single crystalline semiconductor layer (3) having an electron affinity different from that of the first single crystalline semiconductor layer; a heterojunction (12) formed between said first and second single crystalline semiconductor layers(2, 3); a gate electrode (10) on one of the said first and second single crystalline semiconductor layers (2 or 3); and an electron-storing layer for forming a conduction channel, formed in proximity to the hetero- junction due to the difference in electron affinity; characterized in that the first single crystalline semiconductor layer (2) is formed on a semi-insulating substrate (1, Figure 11), the said substrate having at least one lug (lA) positioned below a corresponding gate electrode (10); and in that a conduction layer (7) is formed on the second single crystalline semiconductor layer (3); the height of the lug (lA) exceeding the thickness of the second single crystalline semiconductor layer (3) so that the ends of the heterojunction (12, Figure 13) contact portions of the conduction layer (7); the said portions of the conduction layer (7) having further electrodes (9A, 9B) formed thereon.

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