EP0064298A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Pulse generating circuit for a television camera using solid state image sensor
Assignee: Hitachi Ltd
•
Filing: 1982-05-04
•
Granted: —
•
Expires: 2002-05-04
Abstract
Abstract Disclosed is a solid state television camera with solid state image sensor for converting an optical image into electrical signals, which is comprised of a pulse generator (30, 33, 34, 39) for generating a train of pulses with a frequency equal to the horizontal scanning frequency of a television system, a frequency divider (61) for frequency-dividing the pulse train into a signal with a frequency substantially equal to the vertical scanning frequency alternately in two modes of 1/n and 1/n+1 (wherein n is a positive integer), and a selective circuitry (63, 64, 65, 66 and 67 to 69) for forming a train of pulses with a desired vertical scanning frequency on the basis of the pulse trains derived from the pulse generator (34) and the frequency divider (61).
Inventors
- 👤 Kazuhiro Sato
- 👤 Nobuo Murata
- 👤 Kenji Takahashi
- 👤 Shusaku Nagahara
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-27 19:28
CPC Classifications
H; H04; H04N; H04N25/00
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
121 words
A solid state television camera with solid state image sensor for converting an optical image into electrical signals, comprising: a pulse generator (34) for generating a train of pulses with a frequency equal to the horizontal scanning frequency of a television system; a frequency divider (61, 62) for frequency-dividing the pulse train into a signal with a frequency substantially equal to the vertical scanning frequency alternately in two modes of 1/n and 1/n+l (where n is a positive integer); and a selective circuitry (63, 64, 65, 66, and 67 to 69) for forming a train of pulses with a desired vertical scanning frequency on the basis of the pulse trains derived from said pulse generator (34) and said frequency divider (61).
Claim 2
Dependent Claim
121 words
A solid state television camera with solid state image sensor for converting an optical image into electrical signals, comprising: a pulse generator (34) for generating a train of pulses with a frequency equal to the horizontal scanning frequency of a television system; a frequency divider (61, 62) for frequency-dividing the pulse train into a signal with a frequency substantially equal to the vertical scanning frequency alternately in two modes of 1/n and 1/n+l (where n is a positive integer); and a selective circuitry (63, 64, 65, 66, and 67 to 69) for forming a train of pulses with a desired vertical scanning frequency on the basis of the pulse trains derived from said pulse generator (34) and said frequency divider (61).
Claim 3
Dependent Claim
83 words
A pulse generating circuit according to claim 1, wherein said selective circuitry includes a circuit (63, 64, 65) for processing the output pulses from said pulse generator (34) according to the output pulses from said frequency divider (61), means (66) for delaying the output signal from said processing circuit by a 1/2 horizontal scanning time, and means (67, 68, 69) for alternately selecting the output signals delivered from said processing circuit and delaying means in accordance with the output of said frequency divider.
Claim 4
Dependent Claim
53 words
A pulse generating circuit according to claim 2, wherein said processing circuit counts the pulses (34S) from said pulse generator (34) to convert said pulses into pulses with a pulse width corresponding to a time length specified by either of said frequency dividing mode specified by the output signal from said frequency divider.
Claim 5
Dependent Claim
91 words
A pulse generating circuit according to claim 1, wherein said selective circuitry includes gate means (75) for allowing the output pulses from said pulse generator (34) to pass therethrough for a given time according to the output pulses from said frequency divider (61, 62), a delay circuit (76) for delaying the output signal from said gate means (75) by a 1/2 horizontal scanning time, and means (77) for alternatively selecting the output signals delivered from said gate means and said delay circuit in accordance with the output of said frequency divider.
Claim 6
Dependent Claim
78 words
A pulse generating circuit according to claim 1, wherein said selective circuitry includes a circuit (80, 81, 82) for processing the output pulses from said pulse generator, a shift register (83) for shifting the output pulses from said frequency divider (61, 62) in synchronism with the output pulses from said processing circuit, and a decoder (65") for forming pulses with a given pulse width on the basis of the output pulses from said shift register (83). (Fig. 12)
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.