EP0064231A2
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Compression-type semiconductor device
Assignee: Toshiba Corp
•
Filing: 1982-04-22
•
Granted: —
•
Expires: 2002-04-22
Abstract
Abstract A compression-type semiconductor device comprises a semiconductor element and compression means (13, 14) for maintaining the semiconductor element in a compressed state. The semiconductor element comprises a semiconductor substrate (21) having first and second major surfaces (21a, 21b). The semiconductor substrate (21) has a first semiconductor region including a plurality of semiconductor sections. Each semiconductor section is composed of a plurality of divided semiconductor segments (22) of a first conductivity type projecting on the first major surface (21a) of the substrate (21). These segments (22) have substantially rectangular top surfaces which are present in a plane. The segments (22) in each semiconductor section have approximately the same size and are arranged so that the long sides of adjacent rectangles face each other. A second semiconductor region (23) of a second conductivity type opposite to the first conductivity type is formed in the first major surface (21a) of the substrate (21), surrounding the individual semiconductor segments (22). On the first semiconductor region first electrode means including separate electrode members (27) is formed. The separate electrode members (27) each substantially cover the top surfaces of the segments in each of the semiconductor sections, and electrically connect these segments (22). Second electrode means (28) is formed on the exposed surface of the second semiconductor region (23). Third electrode means (29) is formed on the second major surface (21b) of the semiconductor substrate (21). Insulation means covers the second electrode means (28) between the adjacent semiconductor segments (22) in each semiconductor section.
Inventors
- 👤 Makoto Azuma
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-07 07:01
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10D; H10D18/00; H10D18/60; H10D62/00; H10D62/10; H10D62/117; H10D64/00; H10D64/20; H10D64/23; H10D64/231; H10D64/233; H10W20/482; H10W20/484; H10W72/00; H10W72/30; H10W72/071; H10W72/073; H10W72/07331; H10W72/07337; H10W72/351; H10W72/353; H10W72/354; H10W72/50; H10W72/531; H10W72/5363; H10W72/551; H10W72/552; H10W72/851; H10W72/874; H10W72/884
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
233 words
A compression-type semiconductor device comprising: (a) a semiconductor element comprising: a semiconductor substrate having first and second major surfaces; a first semiconductor region including a plurality of semiconductor sections, said sections each being composed of a plurality of semiconductor segments of a first conductivity type projecting on the first major surface of said substrate, said segments each having a substantially rectangular top surface, the segments in each of said sections having substantially the same size and being arranged so that long sides of adjacent rectangular surfaces thereof face each other; a second semiconductor region of a second conductivity type opposite to said first conductivity type formed in the first major surface and surrounding each of said semiconductor segments; first electrode means including a plurality of separate electrode members each substantially covering top surfaces of the segments in each of said sections and electrically connecting the segments in each of said sections; second electrode means formed on the exposed surface of said second semiconductor region; third electrode means formed on said second major surface of the substrate; and insulating means covering said second electrode means between the adjacent segments in each of said sections; and (b) compression means for applying pressure between said first electrode means and said third electrode means to thereby maintain said semiconductor element in a compressed state; said compression means being electrically connected to said first and second electrode means.
Claim 2
Dependent Claim
233 words
A compression-type semiconductor device comprising: (a) a semiconductor element comprising: a semiconductor substrate having first and second major surfaces; a first semiconductor region including a plurality of semiconductor sections, said sections each being composed of a plurality of semiconductor segments of a first conductivity type projecting on the first major surface of said substrate, said segments each having a substantially rectangular top surface, the segments in each of said sections having substantially the same size and being arranged so that long sides of adjacent rectangular surfaces thereof face each other; a second semiconductor region of a second conductivity type opposite to said first conductivity type formed in the first major surface and surrounding each of said semiconductor segments; first electrode means including a plurality of separate electrode members each substantially covering top surfaces of the segments in each of said sections and electrically connecting the segments in each of said sections; second electrode means formed on the exposed surface of said second semiconductor region; third electrode means formed on said second major surface of the substrate; and insulating means covering said second electrode means between the adjacent segments in each of said sections; and (b) compression means for applying pressure between said first electrode means and said third electrode means to thereby maintain said semiconductor element in a compressed state; said compression means being electrically connected to said first and second electrode means.
Claim 3
Dependent Claim
36 words
The device according to claim 1, wherein said first electrode means includes separate electrode pieces each formed on the top surface of each of said semiconductor segments, said ground electrodes being connected to said electrode members.
Claim 4
Dependent Claim
37 words
The device according to claim 1, wherein said semiconductor element is a gate turn-off thyristor with a cathode region thereof constituted by said first semiconductor region and a gate region thereof constituted by said second semiconductor region.
Claim 5
Dependent Claim
48 words
The device according to claim 3, wherein said semiconductor substrate further includes a third semiconductor region forming a p-n junction with said second semiconductor region and a fourth semiconductor region forming a p-n junction with said third semiconductor region and reaching said second major surface of said substrate.
Claim 6
Dependent Claim
35 words
The device according to claim 1, wherein said semiconductor element is a transistor with an emitter region thereof constituted by said first semiconductor region and a base region thereof constituted by said second semiconductor region.
Claim 7
Dependent Claim
47 words
The device according to claim 5, wherein said semiconductor substrate further includes a third semiconductor region forming a p-n junction with said second semiconductor region and a fourth region forming a p-n junction with said third semiconductor region and reaching said second major surface of the substrate.
Claim 8
Dependent Claim
22 words
The device according to claim 2, wherein said insulating means has a surface flush with the top surfaces of said ground electrodes.
Claim 9
Dependent Claim
188 words
A semiconductor element comprising: a semiconductor substrate having first and second major surfaces; a first semiconductor region including a plurality of semiconductor sections, said sections each being composed of a plurality of semiconductor segments of a first conductivity type projecting on the first major surface of said substrate, said segments each having a substantially rectangular top surface, the segments in each of said sections having substantially the same size and being arranged so that long sides of adjacent rectangular surfaces thereof face each other; a second semiconductor region of a second conductivity type opposite to said first conductivity type formed in the first major surface and surrounding each of said semiconductor segments; first electrode means including a plurality of separate electrode members each substantially entirely covering top surfaces of the segments in each of said sections and electrically connecting the segments in each of said sections; second electrode means formed on the exposed surface of said second semiconductor region; third electrode means formed on said second major surface of the substrate; and insulating means covering said second electrode means between the adjacent segments in each of said sections.
Claim 10
Dependent Claim
188 words
A semiconductor element comprising: a semiconductor substrate having first and second major surfaces; a first semiconductor region including a plurality of semiconductor sections, said sections each being composed of a plurality of semiconductor segments of a first conductivity type projecting on the first major surface of said substrate, said segments each having a substantially rectangular top surface, the segments in each of said sections having substantially the same size and being arranged so that long sides of adjacent rectangular surfaces thereof face each other; a second semiconductor region of a second conductivity type opposite to said first conductivity type formed in the first major surface and surrounding each of said semiconductor segments; first electrode means including a plurality of separate electrode members each substantially entirely covering top surfaces of the segments in each of said sections and electrically connecting the segments in each of said sections; second electrode means formed on the exposed surface of said second semiconductor region; third electrode means formed on said second major surface of the substrate; and insulating means covering said second electrode means between the adjacent segments in each of said sections.
Claim 11
Dependent Claim
36 words
The element according to claim 8, wherein said first electrode means includes separate electrode pieces each formed on the top surface of each of said semiconductor segments, said ground electrodes being connected to said electrode members.
Claim 12
Dependent Claim
37 words
The element according to claim 8, wherein said semiconductor element is a gate turn-off thyristor with a cathode region thereof constituted by said first semiconductor region and a gate region thereof constituted by said second semiconductor region.
Claim 13
Dependent Claim
48 words
The element according to claim 10, wherein said semiconductor substrate further includes a third semiconductor region forming a p-n junction with said second semiconductor region and a fourth semiconductor region forming a p-n junction with said third semiconductor region and reaching said second major surface of said substrate.
Claim 14
Dependent Claim
35 words
The element according to claim 8, wherein said semiconductor element is a transistor with an emitter region thereof constituted by said first semiconductor region and a base region thereof constituted by said second semiconductor region.
Claim 15
Dependent Claim
47 words
The element according to claim 12, wherein said semiconductor substrate further includes a third semiconductor region forming a p-n junction with said second semiconductor region and a fourth region forming a p-n junction with said third semiconductor region and reaching said second major surface of the substrate.
Claim 16
Dependent Claim
22 words
The element according to claim 9, wherein said insulating means has a surface flush with the top surfaces of said ground electrodes.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.