Semiconductor device

Claim 2

A semiconductor device comprising: a semiconductor substrate of the first conductivity type (120, 220); a self substrate bias generator formed in said semiconductor substrate for generating a voltage with the opposite polarity to that of an externally applied voltage and having a capacitive element (112, 212) and a rectifier element (114, 118, 144, 214, 218, 256) and a group of circuit elements supplied with a voltage generated by said self substrate bias generator, characterized in that said semiconductor substrate of the first conductivity type is supplied with a first reference potential (V DD ) selected so as to prevent minority carriers from said capacitive element and said rectifier element from entering into said semiconductor substrate; and said circuit element group is formed in a first semiconductor region (122, 222) formed in said semiconductor substrate.

Claim 3

A semiconductor device according to claim 1, characterized in that said capacitive element includes a second semiconductor region (128) of the second conductivity type formed in said semiconductor substrate, and an electrode (136) formed through a gate insulating film (134) on said second semiconductor region, said electrode being externally supplied with an AC voltage, and said rectifier element includes two MOS transistors (114, 118) with channels of the second conductivity type, one of said MOS transistors (114) including a third semiconductor region (126) of the second conductivity type connected to said second semiconductor region, a fourth semiconductor region (124) of the second conductivity type formed separately from said third semiconductor region and connected to said first semiconductor region, and a gate electrode (132) connected to said third semiconductor region and formed through a gate insulating film (130) on said semiconductor substrate sandwiched by said third and fourth semiconductor regions, while the other MOS transistor (118) including a fifth semiconductor region (170) of the second conductivity type connected to said second semiconductor region, a sixth semiconductor region (172) of the second conductivity type formed separately from said fifth semiconductor region, and a gate electrode (176) formed through a gate insulating film (174) on said semiconductor substrate sandwiched by said fifth and sixth semiconductor regions and coupled with said sixth semiconductor region and supplied with a second reference potential (VSS)'

Claim 4

A semiconductor device according to claim 1, characterized in that said capacitive element includes a second semiconductor region (128) of the second conductivity type formed in said semiconductor substrate, and an electrode (136) formed through a gate insulating film (134) on said second semiconductor region, said electrode being externally supplied with an AC voltage, and said rectifier element includes a MOS transistor (114) with a channel of the second conductivity type and a diode (144), said MOS transistor including a third semiconductor region (126b) of the second conductivity type connected to said second semiconductor region, a fourth semiconductor region (142) of the second conductivity type formed separately from said third semiconductor region and connected to said first semiconductor region, and a gate electrode (132) connected to said third semiconductor region and formed through a gate insulating film (130) on said semiconductor substrate sandwiched by said third and fourth semiconductor regions, and said diode including a fifth semiconductor region (146) of the second conductivity type connected to said second semiconductor region and a sixth semiconductor region (148) of the first conductivity type formed in said fifth semiconductor region and supplied with a second reference potential (VSS).

Claim 5

A semiconductor device according to claim 2 or 3, characterized in that said fourth semiconductor region (142) is formed integral with said first semiconductor region.

Claim 6

A semiconductor device according to claim 1, characterized in that said self substrate bias generator is formed in a second semiconductor region (250) of the second conductivity type formed in said semiconductor substrate.

Claim 7

A semiconductor device according to claim 5, characterized in that said capacitive element includes a third semiconductor region (228) of the first conductivity type formed in said second semiconductor region, and an electrode (236) formed through a gate insulating film (234) on said third semiconductor region, said electrode being externally supplied with an AC voltage, and said rectifier element includes two MOS transistors (214, 218) with channels of the first conductivity type formed in said second semiconductor region, one of said MOS transistors (214) including a fourth semiconductor region (226) of the first conductivity type connected to said third semiconductor region, a fifth semiconductor region (224) of the first conductivity type formed separately from said fourth semiconductor region and connected to said first semiconductor region, and a gate electrode (232) connected to said fifth semiconductor region and formed through a gate insulating film (230) on said second semiconductor region sandwiched by said fourth and fifth semiconductor regions, while the other MOS transistor (218) including a sixth semiconductor region (270) of the first conductivity type connected to said third semiconductor region, a seventh semiconductor region (272) of the first conductivity type formed separately from said sixth semiconductor region and supplied with a second reference potential, and a gate electrode (276) formed through a gate insulating film (274) on said second semiconductor region sandwiched by said sixth and seventh semiconductor regions and coupled with said sixth semiconductor region.

Claim 8

A semiconductor device according to claim 6, characterized in that said second semiconductor (250) region is in a floating state.

Claim 9

A semiconductor device according to claim 5, 6 or 7, characterized in that an eighth semiconductor region (254) with first conductivity type impurity at higher concentration than that of said semiconductor substrate (220) is formed in said substrate sandwiched by said first and second semiconductor regions (222, 250) and is supplied with the first reference potential (V DD ) '

Claim 10

A semiconductor device according to claim 5, characterized in that said capacitive element includes a third semiconductor region (228) of the first conductivity type formed in said second semiconductor region (250), and an electrode (236) formed through a gate insulating film (234) on said third semiconductor region, said electrode being externally supplied with an AC voltage, and said rectifier element includes a diode (256) and a MOS transistor (218) with a channel of the first conductivity type, said diode including a fourth semiconductor region (226) of the first conductivity type connected to said third semiconductor region, and a fifth semiconductor region (250; 258) of the second conductivity type formed in said second semiconductor region and connected to said first semiconductor region, and said MOS transistor (218) including a sixth semiconductor region (270) of the first conductivity type connected to said third semiconductor region, a seventh semiconductor region (272) of the first conductivity type formed separately from said sixth semiconductor region and supplied with a second reference potential, and a gate electrode (276) connected to said sixth semiconductor region and formed through a gate insulating film (274) on said second semiconductor region sandwiched by said sixth and seventh semiconductor regions.

Claim 11

A semiconductor device according to claim 9, characterized in that an eighth semiconductor region (258, 260) with impurity of the second conductivity type at higher concentration than that of said second semiconductor region is formed in said second semiconductor region, surrounding said self substrate bias generator while connecting to said first semiconductor region.

Claim 12

ll. A semiconductor device according to claim 9 or 10, characterized in that a ninth semiconductor region (254) with impurity of the first conductivity type at higher concentration than that of said semiconductor substrate (220) is formed in said semiconductor substrate sandwiched by said first and second semiconductor regions (222, 250) and is supplied with the first reference potential (V DD ).