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EP0062485A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

An emitter-coupled logic circuit device

Assignee: Fujitsu Ltd
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Filing: 1982-03-30
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Granted: —
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Expires: 2002-03-30
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Abstract

Abstract The circuit device comprises first and second voltage supply lines (Li, L 2 ) connected to ground and an external voltage source (VEE) respectively, a voltage regulator (6) connected between the first (L 1 ) and the second (L 2 ) voltage supply lines and having an output terminal connected to a third voltage supply line (L 3 ) to provide the third voltage supply line (L 3 ) with a potential between that of the first (Li) and that of the second (L 2 ) voltage supply line, an output buffer circuit (3) connected between the first (Li) and the third (L 3 ) voltage supply lines, and an inner logic gate circuit (2) connected between the third (L 3 ) and the second (L 2 ) voltage supply lines, so that the current flowing through the output buffer circuit (3) also flows through the inner logic gate circuit (2).

Inventors

  • 👤 Takeda Hirofumi

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-06 17:28
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/0008; H03K19/001; H03K19/02; H03K19/08; H03K19/082; H03K19/086

Claims Analysis

Total Claims: 1
Claim 1
Independent Claim 337 words
An emitter-coupled logic circuit device comprising first (L l ) and second (L 2 ) voltage supply lines connected to ground and an external voltage source (V EE ), respectively, a voltage regulator (6) connected between the first (L l ) and second (L 2 ) voltage supply lines and having an output terminal connected to a third voltage supply line (L 3 ) to provide the third voltage supply line (L 3 ) with a potential (Vm) between that of the ground and that of the voltage source (V EE ), an output buffer circuit (3) connected between the first (L l ) and the third (L 3 ) voltage supply lines, an inner logic gate circuit (2) connected between the third (L 3 ) and the second (L 2 ) voltage supply lines, and input (4.) and output (5) level converter circuits connected, respectively, between an input terminal of the emitter-coupled logic circuit device and the inner logic gate circuit (2) and between the inner logic gate circuit (2) and the output buffer circuit (3) so that the current flowing from the first voltage supply line (L 1 ) to the third voltage supply line (L 3 ) through the output buffer circuit (3) also flows from the third voltage supply line (L 3 ) to the second voltage supply line (L 2 ) through the inner logic gate circuit (2). 2. An emitter-coupled logic circuit device according to claim 1, which also includes an input buffer circuit (1) connected between the first (L1) and the third (L 3 ) voltage supply lines. 3. An emitter-coupled logic circuit device according to claim 1 or 2, in which the voltage regulator (6) has a current path connected between the first (L l ) and the third (L 3 ) voltage lines and the current flowing through the current path also flows through the inner logic gate circuit (2) from the third voltage supply line (L 3 ) to the second voltage supply line (L 2 ).

References Cited (Backward Citations)

US3836789A Cited

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