EP0060535A2
Expired / Lapsed
EP
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Multiprocessor network
Assignee: Recognition Equipment Inc
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Filing: 1982-03-12
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Granted: —
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Expires: 2002-03-12
Abstract
Abstract An expandable multiprocessor system is disclosed wherein each processor is identical and each processor can communicate with other processors on its bus or, through an interconnect board, processors on another bus. Additional buses may be added to the system as desired to add user terminals, disc units, tape units, or other peripherals each of which is connected to an identical microprocessor.
Inventors
- 👤 Bo Gunnar Fredricsson
- 👤 Dan Allan Neilson
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 18:24
CPC Classifications
G; G06; G06F; G06F15/00; G06F15/16; G06F15/163; G06F15/17; G06F13/00; G06F13/14; G06F13/36; G06F13/368; G06F13/37; G06F13/38; G06F13/40; G06F13/4004; G06F13/4027; G06F13/4045
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
50 words
A multiprocessor network wherein a plurality of processors are interconnected with each other on a common backplane bus, characterized by a plurality of user terminals and peripheral equipment each connected to the common backplane by an identical processor and a terminator board for routing the control logic for the backplane.
Claim 2
Dependent Claim
50 words
A multiprocessor network wherein a plurality of processors are interconnected with each other on a common backplane bus, characterized by a plurality of user terminals and peripheral equipment each connected to the common backplane by an identical processor and a terminator board for routing the control logic for the backplane.
Claim 3
Dependent Claim
18 words
The network according to claim 1 charcterized in that each processor has equal priority with all other processors.
Claim 4
Dependent Claim
28 words
The network according to claim 1 characterized in that each processor is assigned a specific position in the backplane and that position is the address of the processor.
Claim 5
Dependent Claim
35 words
The network according to claim 1, further characterized by a connector circuit connected to said backplane and a connectro circuit on a second multiprocessor network to permit the flow of data between the two networks.
Claim 6
Dependent Claim
51 words
The network according to claim 4 characterized by a register associated with each processor in which a two level address may be written, one level address for addressing other processors or the connector circuit on said backplane and the other level address for addressing a processor on said second multiprocessor network.
Claim 7
Dependent Claim
30 words
The network according to claim 1 characterized .in that each processor has a memory circuit associated therewith and said memory may be read by any processor interconnected to the backplane.
Claim 8
Dependent Claim
59 words
An expandable multiprocessor system wherein a plurality of processors are connected together on a common bus, characterized by a backplane, a plurality of identical processors interconnected through said backplane, a terminator circuit connected to the backplane to provide a termination therefore and at least one interconnect circuit for expanding the system to add an additional plurality of identical processors.
Claim 9
Dependent Claim
59 words
An expandable multiprocessor system wherein a plurality of processors are connected together on a common bus, characterized by a backplane, a plurality of identical processors interconnected through said backplane, a terminator circuit connected to the backplane to provide a termination therefore and at least one interconnect circuit for expanding the system to add an additional plurality of identical processors.
Claim 10
Dependent Claim
20 words
The system according to claim 7 characterized in that the processors communicate with one another one byte at a time.
Claim 11
Dependent Claim
33 words
The system according to claim 7 characterized in that each processor may be connected to different peripheral devices and each device is accessible from any processor to which it is not directly connected.
Claim 12
Dependent Claim
67 words
An expandable multiprocessor system comprising a first backplane and a plurality of identical processors connected to said backplane, at least one connector circuit and at least one other backplane connected to said at least one other backplane by said at least one connector circuit whereby any processor on said first backplane can communicate with any processor on the second backplane on said at least one other backplane.
Claim 13
Dependent Claim
67 words
An expandable multiprocessor system comprising a first backplane and a plurality of identical processors connected to said backplane, at least one connector circuit and at least one other backplane connected to said at least one other backplane by said at least one connector circuit whereby any processor on said first backplane can communicate with any processor on the second backplane on said at least one other backplane.
References Cited (Backward Citations)
No citation records indexed.
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