Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
220 words
A semiconductor memory device which is preferably a PROM or a mask ROM, in which MOS transistors (TR) formed in a semiconductor substrate (11), are arranged in rows (R 1 , R 2 , R 3 and R 4 ) and are isolated from each other by a plurality of field insulation films (22) arranged in an island pattern, the MOS transistors aligned in each of the rows (R 1 , R 2 , R 3 , and R 4 ) have a common gate electrode (40A or 40B) extending over that row (R 1 , R 2 , R 3 or R 4 ) of field insulation films (22), the MOS transistors aligned in each of the rows (R 1 , R 2 , R 3 and R 4 ) have a common first region (17) forming a drain (36) or a source (37), and second regions (16) forming the other of the drain (36) or source (37) which are surrounded by a pair of common gate electrodes (40A and 40B) and a pair of field insulation films (22) so that the plurality of second regions (16) are isolated from each other, characterised in that the edges of the field insulation films (22) and of the common gate electrodes (40A and 40B)facing the common first region (17) are coincident.
Claim 2
Dependent Claim
220 words
A semiconductor memory device which is preferably a PROM or a mask ROM, in which MOS transistors (TR) formed in a semiconductor substrate (11), are arranged in rows (R 1 , R 2 , R 3 and R 4 ) and are isolated from each other by a plurality of field insulation films (22) arranged in an island pattern, the MOS transistors aligned in each of the rows (R 1 , R 2 , R 3 , and R 4 ) have a common gate electrode (40A or 40B) extending over that row (R 1 , R 2 , R 3 or R 4 ) of field insulation films (22), the MOS transistors aligned in each of the rows (R 1 , R 2 , R 3 and R 4 ) have a common first region (17) forming a drain (36) or a source (37), and second regions (16) forming the other of the drain (36) or source (37) which are surrounded by a pair of common gate electrodes (40A and 40B) and a pair of field insulation films (22) so that the plurality of second regions (16) are isolated from each other, characterised in that the edges of the field insulation films (22) and of the common gate electrodes (40A and 40B)facing the common first region (17) are coincident.
Claim 3
Dependent Claim
57 words
A semiconductor memory device according to claim 1, wherein the edge (D) of the field insulation films (22) is delineated by etching using a masking film (26) extending between a pair of common gate electrodes (40A and 40B) and using the part of the common gate electrodes (40A and 40B) not covered by the masking film (26).
Claim 4
Dependent Claim
23 words
A semiconductor memory device according to claim 1 or 2, wherein the common first region forms the source (37) of an MOS transistor.
Claim 5
Dependent Claim
30 words
A semiconductor memory device according to claims 1, 2 or 3, wherein the width (S) of the common first region (17) is in a range from 2 to 5 microns.
Claim 6
Dependent Claim
182 words
A method of producing a semiconductor memory device in accordance with claim 1, comprising forming insulation films (12) on at least part of a semiconductor substrate (11) where field insulation films (22) are to be formed subsequently, selectively forming on the insulation films (12) and portions of the semiconductor substrate (11) not covered by the field insulation films (12) a pair of common gate electrodes (40A and 40B ) opposite to one another and extending in rows (R 1 , R 2 , R 3 and R 4 ), selectively forming a masking film (26) extending between the common gate electrodes (40A and 40B) and covering the region between the pair of common gate electrodes (40A and 40B), etching away the exposed insulation films (12) covered by neither the masking films (26) nor the common gate electrodes to form the field insulation films (22) and subsequently introducing inpurities into the semiconductor substrate (11) using the field insulation films (22) and the common gate electrodes (40A and 40B) as masks, to form the sources (37) and drains (38) of the MOS transistors (TR).
Claim 7
Dependent Claim
44 words
A process according to claim 5, wherein the insulation films (12) are first delineated in strip form extending perpendicularly to the direction of the common gates (40A and 40B) and subsequently are delineated in an island pattern to form the field insulation films (22).
Claim 8
Dependent Claim
46 words
-7. A process according to claims 5 or 6, wherein the common gates (40A and 40B) comprise polycrystalline silicon and the masking films (26) consist of a photoresist, and wherein removal of the exposed insulation films (12) is carried out by means of reactive sputter etching.