Clock pulse phase shifter

Claim 2

A phase shifter for phase shifting a single frequency signal comprising: phase quadrature means for producing in phase quadrature first and second signal versions of the single frequency signal, function generator means responsive to a control signal representative of a required phase shift to produce first and second control factors, multiplier means operable to multiply said first and second signal versions by said first and second control factors, respectively, to produce resultant first and second signal versions in phase quadrature having respective controlled amplitudes, and combining means for combining said first and second resultant signal versions to produce an output signal which is a phase shifted version of said (original) single frequency signal, the controlled amplitudes of said resultant signal versions determining the phase of the output signal, and the phase shift (6) of the output signal relative to the original signal being arranged to lie anywhere between 0° and 360 0 by arranging the function generator means so that the controlled amplitudes of said resultant signal versions are made positive or negative selectively, so that the phase shift lies in one of the four quadrants 0° to 90°, 91° to 180°, 181° to 270°, 271° to 360°, which phase shifter is characterised in that means are provided therein which are responsive to said control signal to so control the production of said first and second control factors as they affect the production of said first and second resultant signal versions of the single frequency signal that the phase shift (8) can extend over a number of complete cycles of the single frequency signal.

Claim 3

A phase shifter as claimed in Claim 1, characterised in that said means is a modified function generator means which for different values of said control signal within a given range of values is operable to produce the first and second control factors with such polarities as to cause the controlled amplitudes of said first and second resultant signal versions in phase quadrature to be positive or negative, selectively, for more than one value of said control signal within said range, so that the phase shift (8) can lie in any one of the four quadrants of more than one cycle of the single frequency signal.

Claim 4

A phase shifter as claimed in Claim 1, characterised in that said means comprises first means which, each time the control signal reaches a limit value at either end of a range of values corresponding to a given phase range, is operable to reverse the operating sense of the phase shifter in its utilisation of said first and second control factors, together with second means for causing an associated phase sensitive detector which produces the control signal to reverse the sense that the control signal changes value in response to detected phase variation.

Claim 5

A phase shifter as claimed Claim 3, characterised in that said given phase range is the range +180°.

Claim 6

A phase shifter as claimed in Claim 3, or Claim 4, characterised in that said first and second means comprise respective polarity reversing switches which are connected for operation by the output signal of an arrangement comprising a first limit detector which is connected to receive the control signal and produces a first limit signal each time the control signal reaches one limit value, a second limit detector which is also connected to receive the control signal and produces a second limit signal each time the control signal reaches its other limit value, and a divide-by-two circuit which is connected to receive said first and second limit signals and is responsive to produce a change in said output signal from one of two levels to the other in response to each limit signal, the polarity reversing switches being operated from their subsisting condition to the opposite condition in response to each output signal change.

Claim 7

A phase shifter as claimed in any preceding Claim, wherein the first and second signal versions as produced by the phase quadrature means comprise respective pairs of anti-phase signals, wherein the first and second control factors are control currents which are produced by a current generator, which constitutes the function generator means, as respective pairs of oppositely poled currents of which the difference between the two currents of each pair represents the relevant control current, and wherein said multiplier means comprises a first four quadrant multiplier for producing said first resultant signal version in response to one of said pairs of anti-phase signals and one of said pairs of oppositely poled currents and a second four quadrant multiplier for producing said second resultant signal version in response to the other of said pairs of anti-phase signals and the other of said pairs of oppositely poled current.

Claim 8

A phase shifter as claimed in Claim 6, wherein said current generator comprises a plurality of transistor pairs each having first and.second transistors connected in a long-tailed configuration in which their emitters are coupled to a current source via respective emitter resistances, which transistor pairs are arranged in two sets that provide said respective pairs of oppositely poled currents at respective pairs of positive and negative output terminals; in which two sets the base of the first transistor of each pair is connected to receive a control voltage which constitutes said control signal and the base of the second transistor of each pair is connected to a respective tapping point of a potential divider, which tapping points as considered in their order of potential have the bases of the second transistors from one set and the other connected to them alternately; and in each set the collectors of the first transistors of successive transistor pairs are connected to the positive output terminal and the negative output terminal alternately, and likewise their second transistor collectors are connected to these terminals alternately, the arrangement being such that for a given value of control voltage lying between the potentials of two immediately adjacent tapping points, those transistor pairs having their second transistor bases connected to respective other tapping points have one transistor fully conductive and the other non-conductive, whereas for the two transistor pairs, one from each set, having their second transistor bases connected respectively to these two immediately adjacent tapping points, their two transistors are both partially conductive differentially to an extent determined by the value of said emitter resistances and said control voltage.

Claim 9

A phase shifter as claimed in Claim 7, wherein said current sources are constant current sources.

Claim 10

A phase shifter as claimed in any preceding Claim, embodied in a data clock pulse generator in which the locally generated clock pulses are generated by an oscillator and are applied to the phase shifter which is controlled by said control signal to produce phase-corrected clock pulses.