Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
227 words
A high voltage semiconductor device comprising a semiconductor body and means for forming a depletion layer throughout a portion of said body in at least a high voltage mode of operation of the device, characterized in that said body portion comprises a plurality of first regions of a first conductivity type interleaved with second regions of the opposite, second conductivity type, in that the total number of first and second regions is at least four, in that at least said first regions in at least one mode of operation of the device provide electrically parallel current paths extending through said body portion, and in that said first and second regions are depleted of free charge-carriers in said high voltage mode of operation to form interleaved positive and negative space charge regions and so serve to carry the high voltage occurring across said body portion when depleted of free charge-carriers by the depletion layer spreading therein, the thickness and doping concentration of each of said first and second regions being such that the space charge per unit area formed in each of said interleaved regions when depleted of free charge-carriers by said depletion layer is balanced at least to such an extent that the electric field resulting from said space charge is less than the critical field strength at which avalanche breakdown would occur in said body portion.
Claim 2
Dependent Claim
227 words
A high voltage semiconductor device comprising a semiconductor body and means for forming a depletion layer throughout a portion of said body in at least a high voltage mode of operation of the device, characterized in that said body portion comprises a plurality of first regions of a first conductivity type interleaved with second regions of the opposite, second conductivity type, in that the total number of first and second regions is at least four, in that at least said first regions in at least one mode of operation of the device provide electrically parallel current paths extending through said body portion, and in that said first and second regions are depleted of free charge-carriers in said high voltage mode of operation to form interleaved positive and negative space charge regions and so serve to carry the high voltage occurring across said body portion when depleted of free charge-carriers by the depletion layer spreading therein, the thickness and doping concentration of each of said first and second regions being such that the space charge per unit area formed in each of said interleaved regions when depleted of free charge-carriers by said depletion layer is balanced at least to such an extent that the electric field resulting from said space charge is less than the critical field strength at which avalanche breakdown would occur in said body portion.
Claim 3
Dependent Claim
33 words
A device as claimed in Claim 1, further characterized in that said first and second regions are in the form of interleaved layers extending substantially parallel to a major surface of the body.
Claim 4
Dependent Claim
45 words
A device as claimed in Claim 2, further characterized in that connection means electrically connecting said first regions and connection means electrically connecting said second regions are present in grooves in said major surface and contact their respective regions at side walls of the grooves.
Claim 5
Dependent Claim
17 words
A device as claimed in Claim 3, further characterized in that said grooves have a V-shape cross-section.
Claim 6
Independent Claim
52 words
A device as claimed in any of the preceding Claims, further characterized in that said first regions are electrically connected to each other by a third region of said body, which third region is of the first conductivity type and adjoins said first regions at an area spaced from said junction-forming means.
Claim 7
Independent Claim
43 words
A device as claimed in any of Claims 1 to 5, further characterized in that said depletion layer is formed by means of a metal-based layer provided on one end of said interleaved regions and forming a Schottky junction with said first regions.
Claim 8
Independent Claim
52 words
A device as claimed in any of Claims 1 to 5, further characterized in that said depletion layer is formed by means of a further region of said body, which further region is of the second conductivity type and forms a p-n junction with one end of each of said first regions.
Claim 9
Independent Claim
57 words
A device as claimed in any of the preceding Claims, further characterized in that in one mode of operation current flows through said body portion as minority carriers in at least said first regions, and said minority carriers are extracted across the p-n junctions between the interleaved regions when the device operation is switched to another mode.
Claim 10
Independent Claim
35 words
A device as claimed in any of the preceding Claims, further characterized in that said device comprises a bipolar transistor with said interleaved regions providing adjacent parts of the base and collector of said transistor.
Claim 11
Independent Claim
37 words
A device as claimed in any of Claims 1 to 8, further characterized in that said device comprises a power rectifier diode with said interleaved regions forming an intermediate region between anode and cathode of the diode.
Claim 12
Independent Claim
66 words
A device as claimed in any of Claims 1 to 8, further characterized in that said device comprises a junction-gate field-effect transistor with said interleaved regions present between source and drain of said transistor, in that said first regions provide channel regions of the transistor, and in that said second regions are connected to a gate of the transistor and serve as extensions of said gate.
Claim 13
Dependent Claim
36 words
A device as claimed in Claim 11, further characterized in that said gate is a further region of the second conductivity type and forms a p-n junction with one end of each of said first regions,
Claim 14
Independent Claim
102 words
A device as claimed in any of Claims 1 to 7, further characterized in that said device comprises an insulated-gate field-effect transistor having a source which is separated from said interleaved regions by a further region of the second conductivity type and having at least one gate insulated from said further region for capacitively generating a conductive channel in said further region for charge carriers of said first conductivity type to flow between the transistor source and drain, said interleaved regions being present between said further region and the transistor drain, and said first regions further serving as extensions of said drain.
Claim 15
Dependent Claim
110 words
A device as claimed in Claim 13, further characterized in that said device also comprises a second insulated-gate field-effect transistor which is of complementary conductivity type to the first-mentioned field-effect transistor, said second regions serving as drain extensions of said second transistor and forming a p-n junction with another region of the first conductivity type which separates said interleaved regions from a source of the second transistor, at least one gate of said second transistor being insulated from said other region for capacitively generating a conductive channel in said other region for charge carriers of said second conductivity type to flow between the source and drain of said second transistor.
Claim 16
Independent Claim
44 words
A device as claimed in any of Claims 10 to 13, in which said semiconductor body is in the form of a plurality of superimposed semiconductor layers which provide said interleaved regions and the bottom layer of which is mounted on a dielectric substrate.
Claim 17
Independent Claim
66 words
A device as claimed in any of Claims 1 to 9, further characterized in that said device comprises two circuit elements which are of complementary conductivity types and which are connected in an inverse parallel arrangement across said body portion, the interleaved first and second regions providing electrically parallel current paths of one circuit element interleaved with electrically parallel current paths of the complementary circuit element.