EP0052948A1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Oxide isolation process
Assignee: Motorola Solutions Inc
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Filing: 1981-10-27
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Granted: —
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Expires: 2001-10-27
Abstract
Abstract A method for the construction of oxide-isolated silicon integrated circuit structures is described wherein two pattern-forming means are utilized, the first (40) to provide definition for the etching of silicon tubs (43) and the second (46) to coat the sidewalls (44) of the silicon tubs (43) to control oxidation thereon. When oxidation of the material in the bottom (47) of the tubs (43) is carried out to provide a deep oxide region (50), formation of a ridge or berm at the periphery of the oxide region through excess oxidation of the sidewalls is avoided. The protective coating (48) on the sidewalls (44) is obtained by conformally coating the entire wafer with material having controlled oxidation properties. This coating is subsequently removed at all locations except the sidewalls (44) by anisotropic etching prior to oxidation of the silicon (47).
Inventors
- 👤 Walter F. Krolikowski
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 20:18
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10P; H10P14/00; H10P14/60; H10P14/61; H10W10/10; H10W10/13
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
246 words
A method for forming in a major surface of a silicon wafer at least one oxide region of a predetermined shape whose exterior surface is substantially flat and coplanar with adjacent regions of said major surface, comprising: forming on said major surface a first pattern-forming means (40) resistant to silicon etching and oxidation; forming therein a first pattern shape (41) of perimeter P corresponding, within a predetermined etch undercut (55), substantially to said predetermined shape; removing therefrom said first pattern shape so as to expose an underlying silicon region (42) substantially corresponding to said first pattern shape (41); etching said underlying silicon region (42) perpendicularly to said major surface to a predetermined bottom depth (45), and laterally parallel to said major surface by said predetermined etch undercut (55) from said perimeter P, so as to form a tub region (43) having a bottom region (47) and a sidewall region (44); depositing conformally thereon a second pattern-forming means (46) having an oxidation rate less than silicon; removing selectively said second pattern forming means (46) so as to expose said bottom region (47) to subsequent oxidation, but leave a sufficient thickness (48) of said second pattern forming means (46) remaining on said sidewall region (44) to control oxidation thereon; forming said oxide region (50-51) in said tub region; continuing until said exterior surface (52) of said oxide region (50-51) formed in said tub region is substantially flat and coplanar with said adjacent regions (53) of said major surface.
Claim 2
Independent Claim
246 words
A method for forming in a major surface of a silicon wafer at least one oxide region of a predetermined shape whose exterior surface is substantially flat and coplanar with adjacent regions of said major surface, comprising: forming on said major surface a first pattern-forming means (40) resistant to silicon etching and oxidation; forming therein a first pattern shape (41) of perimeter P corresponding, within a predetermined etch undercut (55), substantially to said predetermined shape; removing therefrom said first pattern shape so as to expose an underlying silicon region (42) substantially corresponding to said first pattern shape (41); etching said underlying silicon region (42) perpendicularly to said major surface to a predetermined bottom depth (45), and laterally parallel to said major surface by said predetermined etch undercut (55) from said perimeter P, so as to form a tub region (43) having a bottom region (47) and a sidewall region (44); depositing conformally thereon a second pattern-forming means (46) having an oxidation rate less than silicon; removing selectively said second pattern forming means (46) so as to expose said bottom region (47) to subsequent oxidation, but leave a sufficient thickness (48) of said second pattern forming means (46) remaining on said sidewall region (44) to control oxidation thereon; forming said oxide region (50-51) in said tub region; continuing until said exterior surface (52) of said oxide region (50-51) formed in said tub region is substantially flat and coplanar with said adjacent regions (53) of said major surface.
Claim 3
Dependent Claim
42 words
The method of claim 1 wherein said predetermined etch undercut (55) is larger than one-fourth but less than twice said predetermined bottom depth (45), and wherein said selective removal of said second pattern-forming means (46) is accomplished by an anisotropic etching means.
Claim 4
Dependent Claim
38 words
The method of claim 2 wherein said anisotropic etching means is ion milling, and wherein said ion milling takes place at an angle of incidence, measured with respect to a surface normal, of not more than 60 degrees.
Claim 5
Dependent Claim
56 words
The method of claim 1, or 2, or 3 wherein said first pattern-forming means (40) consists essentially of a sandwich of a layer of silicon dioxide formed on said silicon wafer and a layer of silicon nitride formed on said layer of silicon dioxide, and wherein said second pattern-forming means (46) consists essentially of silicon nitride.
Claim 6
Dependent Claim
95 words
The method of claim 4 wherein said layer of silicon dioxide has a thickness in the range 100 to 5000 Angstroms (10- 8 to 5 x 10- 7 m), and said layer of silicon nitride has a thickness in the range of 500 to 5000 Angstroms (5 x 10- 8 to 5 x 10- 7 m), and wherein said sufficient thickness (48) of said second pattern forming means (46) remaining on said sidewall region (44) of said tub region (43) is in the range 100-500 Angstroms (10- 8 to 5 x 10- 8 m ).
Claim 7
Dependent Claim
9 words
A product formed using the process of claim 1.
References Cited (Backward Citations)
US3966514A
Cited
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