EP0052038A2
Expired / Lapsed
EP
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Method of fabricating integrated circuit structure
Assignee: Fairchild Semiconductor Corp
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Filing: 1981-10-22
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Granted: —
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Expires: 2001-10-22
Abstract
Abstract A lateral transistor structure having a self-aligned base and base contact is provided, together with a method for fabricating such a structure in which the base width is controlled by lateral diffusion of an impurity through a polycrystalline silicon layer. The resulting zone of impurity changes the etching characteristics of the layer and permits use of a selective etchant to remove all of the layer except the doped portion. The doped portion may then be used as a mask to define the base electrical contact, which in turn is used to provide a self-aligned base for the transistor. Dopants introduced on opposite sides of the base electrical contact create the emitter and collector.
Inventors
- 👤 Madhukar B. Vora
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-25 01:21
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/311; H10P; H10P32/00; H10P32/30; H10P32/302; H10P76/00; H10P76/40
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
89 words
A method of fabricating an integrated circuit structure characterized by the steps of: forming a first layer on an underlying semiconductor substrate and a second layer on the first layer, the second layer having an edge; defining a zone of impurity in the second layer by introducing a first impurity into the second layer through the edge; removing the first layer except where it is overlaid by the zone of impurity; and introducing a second impurity into the substrate except where the substrate is overlaid by the first layer.
Claim 2
Independent Claim
89 words
A method of fabricating an integrated circuit structure characterized by the steps of: forming a first layer on an underlying semiconductor substrate and a second layer on the first layer, the second layer having an edge; defining a zone of impurity in the second layer by introducing a first impurity into the second layer through the edge; removing the first layer except where it is overlaid by the zone of impurity; and introducing a second impurity into the substrate except where the substrate is overlaid by the first layer.
Claim 3
Dependent Claim
25 words
- A method as in claim 1 characterized in that the first layer is laterally extended prior to the step of introducing the second impuritv.
Claim 4
Dependent Claim
18 words
A method as in claim 2 characterized in that the first layer is laterally extended by being oxidized.
Claim 5
Dependent Claim
43 words
A method as in claim 2 or 3 characterized in that the substrate is P-conductivity type silicon; the second impurity is N-conductivity type; and the step of laterally extending the first layer protects the PN junctions created by introduction of the second impurity.
Claim 6
Independent Claim
32 words
A method as in any one of claims 1 to 4 characterized in that the first layer comprises a lower region, a middle region and an upper region, each of different materials.
Claim 7
Independent Claim
29 words
A method as in any one of claims 1 to 5 characterized in that the second layer comprises an underlying region and an overlying region, each of different materials.
Claim 8
Independent Claim
34 words
A method as in claims 5 and 6 characterized in that the upper region of the first layer and the overlying region of the second layer are resistant to diffusion of the first impurity.
Claim 9
Independent Claim
25 words
A method as in any one of claims 5 to 7 characterized in that the lower region is polycrystalline silicon and the impurity is boron.
Claim 10
Independent Claim
36 words
A method as in any one of claims 5 to 8 characterized in that the lower region is polycrystalline silicon, the middle region is a metal silicide, and the upper region is an oxide of silicon.
Claim 11
Dependent Claim
83 words
An integrated circuit structure comprising: an insulating substrate; . a layer of semiconductor material on the substrate; and characterized by: a first and second region of first conductivity type extending through the layer to the substrate; a third region of opposite conductivity type to the first conductivity type, the third region separating the first region from the second region; and a conductive region overlying substantially all of the third region but not overlving any of either the first region or the second region.
Claim 12
Dependent Claim
83 words
An integrated circuit structure comprising: an insulating substrate; . a layer of semiconductor material on the substrate; and characterized by: a first and second region of first conductivity type extending through the layer to the substrate; a third region of opposite conductivity type to the first conductivity type, the third region separating the first region from the second region; and a conductive region overlying substantially all of the third region but not overlving any of either the first region or the second region.
Claim 13
Dependent Claim
17 words
Structure as in claim 10 characterized in that a region of insulating material surrounds the conductive region.
Claim 14
Dependent Claim
21 words
Structure as in claim 11 characterized in that the conductive region comprises polycrystalline silicon and the insulating material is silicon dioxide.
Claim 15
Dependent Claim
16 words
Structure as in claim 12 characterized in that the conductive region further comprises a metal silicide.
Claim 16
Dependent Claim
14 words
Structure as in claim 13 characterized in that the metal silicide is tungsten silicide.
Claim 17
Dependent Claim
20 words
Structure as in any one of claims 10 to 14 characterized in that the layer of semiconductor material is silicon.
Claim 18
Dependent Claim
22 words
Structure as in any one of claims 10 to 15 characterized in that the third region comprises a base of a transistor.
Claim 19
Dependent Claim
24 words
Structure as in any one of claims 10 to 16 characterized in that the conductive region comprises an electrical connection to the third region.
Claim 20
Dependent Claim
28 words
Structure as in any one of claims 10 to 17 characterized in that the first and the second regions comprise an emitter and a collector of a transistor.
Claim 21
Dependent Claim
19 words
Structure as in any one of claims 10 to 18 characterized in that the insulating substrate comprises silicon dioxide.
Claim 22
Independent Claim
159 words
A method of fabricating an integrated circuit structure characterized by the steps of: forming a sandwich of at least four layers designated first through fourth from the bottom upward on a semiconductor substrate; removing portions of the third and the fourth layer to create an edge; introducing a first imourity into the third layer through the edge to create a zone of impurity, the second and the fourth lavers being relatively impermeable to the impurity; removing all of the third and the fourth layers except the zone of impurity; removing all of the first and the second layers except those portions underlying the zone of impurity; removing an additional portion of the first layer from the exposed sides of the first layer; forming insulating material on the thereby exposed sides of the first layer; and introducing a second impurity into the semiconductor substrate through the portions not overlaid by either one of the first layer and the insulating material.
Claim 23
Independent Claim
159 words
A method of fabricating an integrated circuit structure characterized by the steps of: forming a sandwich of at least four layers designated first through fourth from the bottom upward on a semiconductor substrate; removing portions of the third and the fourth layer to create an edge; introducing a first imourity into the third layer through the edge to create a zone of impurity, the second and the fourth lavers being relatively impermeable to the impurity; removing all of the third and the fourth layers except the zone of impurity; removing all of the first and the second layers except those portions underlying the zone of impurity; removing an additional portion of the first layer from the exposed sides of the first layer; forming insulating material on the thereby exposed sides of the first layer; and introducing a second impurity into the semiconductor substrate through the portions not overlaid by either one of the first layer and the insulating material.
Claim 24
Dependent Claim
19 words
A method as in claim 20 characterized in that the first layer includes a lower and an upper region.
Claim 25
Dependent Claim
23 words
A method as in claim 21 characterized in that the lower region is polycrystalline silicone and the upper region is a metal silicide.
Claim 26
Dependent Claim
32 words
A method as in claim 22 characterized in that the first layer and the third layer comprise polycrystalline silicon and the second layer and the fourth layer comprise an oxide of silicon.
References Cited (Backward Citations)
No citation records indexed.
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