EP0051473A1
Expired / Lapsed
EP
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Phase-locked loop with initialization loop
Assignee: Westinghouse Electric Corp
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Filing: 1981-10-30
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Granted: —
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Expires: 2001-10-30
Abstract
Abstract The invention provides an integrator (23) and a voltage controlled oscillator (12) to produce a variable frequency output signal (Vp'). A primary loop (39) is locked to an input signal (V Rec ) and has a narrow bandwith allowing the output signal to precisely track the input signal. An initialization loop (41) is locked to an internally generated reference signal (V Ref2 ) and has a wide bandwidth for pulling the frequency of the reference signal. A switch (22) selectively connects components of the primary loop (39) to the integrator (23) when the frequency difference between the reference signal and the output signal is small and connects components of the initialization loop (41) to the integrator (23) when the frequency difference between the reference signal and the output signal is large.
Inventors
- 👤 Ronald Lloyd Lee
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-01 08:00
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/10; H03L7/113; H04; H04L; H04L27/00; H04L27/02; H04L27/06; H04L27/066
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
214 words
A phase-locked circuit loop producing an output signal [Fig. 1 (VOut); Fi g. 2 (V P ')] having a frequency locked to the frequency of an input signal (V In ), comprising: means (12) for producing the output signal, said output signal having a variable frequency; first means [Fig. 1 (14)] for detecting a phase difference between said input signal and said output signal, said first phase detection means having a narrow bandwidth; means for producing a reference signal [Fig. 1 (VRef) Fig. 2 (V Ref2 )]; second means (17) for detecting a phase difference between said reference signal and said output signal, said second phase detection means having a wide bandwidth; and characterized by: control means [Figs. 1-4 (20)] responsive to said second phase detection means, said control means producing a switching signal (V Sw ) representative of the frequency difference between said reference signal and said output signal; and switching means (22) selectively connecting both said first phase detection means and said second phase detection means to said means producing said output signal, said switching means being responsive to said switching signal such that when said frequency difference between said reference signal and said output signal is large said second phase detection means is connected to said means producing said output signal.
Claim 2
Dependent Claim
214 words
A phase-locked circuit loop producing an output signal [Fig. 1 (VOut); Fi g. 2 (V P ')] having a frequency locked to the frequency of an input signal (V In ), comprising: means (12) for producing the output signal, said output signal having a variable frequency; first means [Fig. 1 (14)] for detecting a phase difference between said input signal and said output signal, said first phase detection means having a narrow bandwidth; means for producing a reference signal [Fig. 1 (VRef) Fig. 2 (V Ref2 )]; second means (17) for detecting a phase difference between said reference signal and said output signal, said second phase detection means having a wide bandwidth; and characterized by: control means [Figs. 1-4 (20)] responsive to said second phase detection means, said control means producing a switching signal (V Sw ) representative of the frequency difference between said reference signal and said output signal; and switching means (22) selectively connecting both said first phase detection means and said second phase detection means to said means producing said output signal, said switching means being responsive to said switching signal such that when said frequency difference between said reference signal and said output signal is large said second phase detection means is connected to said means producing said output signal.
Claim 3
Dependent Claim
73 words
The phase-locked loop as claimed in claim 1 wherein the output signal is a regenerated pilot tone for use in recovering an informational signal [Fi g. 2 (V Aud )] from a received signal (Vp ) further including demodulation means (30) responsive to both the received signal and said regenerated pilot tone, said demodulation means recovering both the informational signal (V D ) and a recovered pilot tone (Vp) from the received signal.
Claim 4
Dependent Claim
32 words
The phase-locked loop as claimed in claim 1 or 2 wherein the means for producing the output signal includes an integrator (23), and a voltage controlled oscillator (12) responsive to said integrator.
Claim 5
Dependent Claim
22 words
The phase-locked loop as claimed in claim 1, 2 or 3 including a filter (15) responsive to the first phase detection means.
Claim 6
Dependent Claim
38 words
The phase-locked loop as claimed in any one of claims 1 to 4 wherein the first phase detection means includes a first mixer [Fig. 2 (35)] and wherein the second phase detection means includes a second mixer (36).
Claim 7
Dependent Claim
58 words
The phase-locked loop as claimed in claim 5 when dependent through claim 2 wherein the second mixer [Fig. 2 (36)] is responsive to both the reference signal (V Ref2 ) and the regenerated pilot tone, and includes a third mixer (37) responsive to both the output of said second mixer and a third reference signal (V Ref3 ).
Claim 8
Dependent Claim
22 words
The phase-locked loop as claimed in claim 1, 5 or 6 including an amplifier (18) responsive to the second phase detection means.
Claim 9
Dependent Claim
31 words
The phase-locked loop as claimed in any one of claims 1, 5 or 6 wherein the frequency of the reference signal is approximately equal to the frequency of the input signal.
Claim 10
Dependent Claim
18 words
The phase-locked loop claim 2 or 6 wherein the regenerated pilot tone has a frequency of 5.2 megahertz.
Claim 11
Dependent Claim
18 words
The phase-locked loop as claimed in claim 2 or 6 wherein the demodulation means includes a quadrature oscillator.
Claim 12
Dependent Claim
28 words
The phase-locked loop as claimed in claim 2, 6 or 10 including means (76)-producing an off-frequency alarm signal (V A ), said means responsive to the switching signal.
Claim 13
Dependent Claim
82 words
The phase-locked loop as claimed in claim 1 or 2 wherein the control means includes a Schmidt trigger [Figs. 3, 4 (44)] responsive to the second phase detection means, and includes an adjustable monostable multivibrator (45) responsive to said Schmidt trigger, and includes a D-type flip-flop (47) having a D input terminal responsive to said multivibrator, a clock input terminal responsive to said Schmidt trigger, and a reset input terminal responsive to said multivibrator, and an output terminal producing the switching signal.
Claim 14
Dependent Claim
16 words
The phase-locked loop as claimed in claim 12 including means (74) for delaying the switching signal.
Claim 15
Dependent Claim
40 words
The phase-locked loop as claimed in claim 13 wherein the means for delaying includes a capacitor connected between the output terminal and a set input terminal of the flip-flop, said set input terminal further connected to a negative voltage source.
Claim 16
Dependent Claim
49 words
The phase-locked loop as claimed in any one of claims 1, 2, 8 or 9 wherein the second phase detection means is connected to the means producing the output signal in response to the frequency difference between the reference signal and the output signal being greater than fourteen hertz.
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