Patent US3272954A successfully refreshed from Google Patents.
EP0050484A2
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Sense amplifier circuit
Assignee: Fujitsu Ltd
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Filing: 1981-10-15
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Granted: —
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Expires: 2001-10-15
Abstract
Abstract A sense amplifier circuit used in, for example, a MIS static RAM comprises a differential amplifier (Q 11 through Q 14 ) for sensing and amplifying the difference in potential between two input lines (DB and DB) and generating two bipolar differential signals (D and D) and a pull-down circuit (Q 15 ) for pulling down the reference potential (V REF ) of the differential amplifier. A compensation circuit (Q 16 , Q 17 and Q 18 ) is provided for detecting the in-phase component of the input lines so as to control the pull-down circuit. The fluctuation of the reference potential follows the fluctuation of the in-phase component.
Inventors
- 👤 Atsushi Oritani
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-09 04:53
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/41; G11C11/413; G11C11/417; G11C11/419
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
154 words
A sense amplifier circuit comprising: first and second power supplies; first and second input lines; first and second output lines; a differential amplifier, connected to said first power supply, to said first and second input lines and to said first and second output lines, for sensing and amplifying the difference in potential between said first and second input lines and generating bipolar signals, whose difference in potential is in response to the difference in potential between said first and second input lines, to said output lines; a first pull-down circuit, connected to said differential amplifier and to said second power supply, for pulling down the reference potential of said differential amplifier; and a compensation circuit, connected to said first and second power supplies, to said pull-down circuit and to said input lines, for detecting the in-phase component of the potentials of said input lines so as to control the conductance of said pull-down circuit.
Claim 2
Dependent Claim
154 words
A sense amplifier circuit comprising: first and second power supplies; first and second input lines; first and second output lines; a differential amplifier, connected to said first power supply, to said first and second input lines and to said first and second output lines, for sensing and amplifying the difference in potential between said first and second input lines and generating bipolar signals, whose difference in potential is in response to the difference in potential between said first and second input lines, to said output lines; a first pull-down circuit, connected to said differential amplifier and to said second power supply, for pulling down the reference potential of said differential amplifier; and a compensation circuit, connected to said first and second power supplies, to said pull-down circuit and to said input lines, for detecting the in-phase component of the potentials of said input lines so as to control the conductance of said pull-down circuit.
Claim 3
Dependent Claim
67 words
A sense amplifier circuit as set forth in claim 1, wherein said compensation circuit comprises: a first load transistor connected to said first power supply and to said pull-down circuit; and first and second transistors of an enhancement type, each having a drain connected to said first load transistor, a gate connected to one of said input lines and a source connected to said second power supply.
Claim 4
Dependent Claim
27 words
A sense amplifier circuit as set forth in claim 2, wherein said first load transistor is of a depletion type with a gate and a source coupled.
Claim 5
Dependent Claim
27 words
A sense amplifier circuit as set forth in claim 2, wherein said first load transistor is of an enhancement type with a drain and a gate coupled.
Claim 6
Dependent Claim
77 words
A sense amplifier circuit as set forth in any preceding claim, wherein said differential amplifier comprises: second and third load transistors connected to said first power supply; and first and second input transistors of an enhancement type, each having a drain connected to one of said first and second load transistors and to one of said output lines, a gate connected to one of said input lines and a source commonly connected to said first pull-down circuit.
Claim 7
Dependent Claim
29 words
A sense amplifier circuit as set forth in claim 5, wherein said second and third load transistors are of a depletion type with a gate and a source coupled.
Claim 8
Dependent Claim
29 words
A sense amplifier circuit as set forth in claim 5, wherein said second and third load transistors are of an enhancement type with a drain and a gate coupled.
Claim 9
Dependent Claim
47 words
A sense amplifier circuit as set forth in claim 5, 6 or claim 7, wherein said differential amplifier further comprises first and second latch transistors of an enhancement type with drains and gates cross-coupled, each connected to one of said first and second input transistors in parallel.
Claim 10
Dependent Claim
69 words
A sense amplifier circuit as set forth in claim 5, 6 or claim 7, further comprising a second pull-down circuit the conductance of which is controlled by said compensation circuit, and wherein said differential amplifier further comprises first and second latch transistors of an enhancement type with drains and gates cross-coupled, each connected to one of said first and second load transistors and commonly to said second pull-down circuit.
Claim 11
Dependent Claim
48 words
A sense amplifier circuit as set forth in any preceding claim , wherein said first pull-down circuit comprises a transistor of an enhancement type having a drain connected to said differential amplifier, a gate connected to said compensation circuit and a source connected to said second power supply.
Claim 12
Dependent Claim
50 words
A sense amplifier circuit as set forth in claim 9, wherein said second pull-down circuit comprises a fourth transistor of an enhancement type having a drain connected to said first and second latch transistors, a gate connected to said compensation circuit and a source connected to said second power supply.
Claim 13
Dependent Claim
73 words
A sense amplifier circuit as set forth in claim 1,2,3 or claim 4, wherein said differential amplifier circuit comprises: second and third load transistors connected to said first power supply; and first and second latch transistors of an enhancement type with drains and gates cross-coupled, each having a drain connected to one of said input lines and to one of said output lines, and a source commonly connected to said first pull-down circuit.
References Cited (Backward Citations)
No citation records indexed.
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