Image processing filter

Claim 2

1 . A two-dimensional finite impulse response filter for filtering image pixels with minimal pixel processing steps, comprising, in combination: first-and second sections (12, 14) for filtering image pixels, the output of said first section being fed to said second section so that said image pixels are filtered successively to provide filtered pixels at the output of said second section; said first and second sections including: a) buffers (20-23, 60, 62, 122, 123, 200, 207, 221-224) for receiving and temporarily storing image pixels to be filtered; b) means (50, 75, 100, 108, 115, 140, 205, 215, 240, 242, 250) for adding discrete pixel inputs to provide a totalized output; c) pixel buses (30-33, 68, 105, 106, 116, 216, 232, 233) coupling input/output ports of individual buffers in said buffer series to said adder means whereby to feed pixels from buffers to said adder means; and d) multiplier means (40-44, 65, 67, 69, 110, 112, 135, 212, 245, 246) in at least one of said pixel buses for multiplying pixels input to said adder means by a predetermined filter factor.

Claim 3

The filter according to claim 1, including multiplier means in each of said pixel buses.

Claim 4

The filter according to claim 1 in which said first section buffer series comprises a preset number of one-pixel delay buffers and in which said second section buffer series comprises a preset number of pixel line storage buffers.

Claim 5

The filter according to claim 1 including: second adder means (100, 108) for each pair of buffers in said buffer series; pixel conductors (27, 101, 105, 106) coupling successive first and last pairs of said buffers with individual ones of said second adder means, said multiplier means (110, 112) coupling the outputs of said second adder means with said first mentioned adder means (115); one of said pixel buses (116) being coupled between the center pair of buffers in said buffer series and directly to said first mentioned adder means, whereby to bypass said second adder means and said multiplier means.

Claim 6

A multi-dimensional finite impulse response filter having reduced image signal processing steps, comprising in combination: a) an X-dimension filter section (12) including: 1) an image signal buffer series (20-23) for receiving and temporarily storing at least a portion of a line of image signals for filtering thereof, said image signals being input to the first buffer in said buffer series and transmitted through successive ones of the buffers in said buffer series to the buffer series output; 2) adder means (50) for summing signals input thereto; 3) a first bus group (30-33) tapped into the inputs of each buffer in said buffer series and said buffer series output for conducting signals from said buffer series to said adder means input; and 4) multiplier means in at least one of the buses comprising said first bus group for multiplying image signals input to said adder means by a predetermined filter factor; and b) a Y-dimension filter section (14) including: 1) a second image signal buffer series (60, 62) for receiving and temporarily storing at least a portion of a line of image signals from said X-dimension filter section adder means for filtering thereof, said image signals being input to the first buffer of said second buffer series and transmitted through successive ones of the buffers in said second buffer series to said second buffer series output; 2) second adder means (75) for summing signals input thereto; 3) a second bus group (66, 68, 70) tapped into the inputs of each buffer in said second buffer series and said second buffer series output for conducting signals from said second buffer series to said second adder means input; and 4) second multiplier means (65, 67, 69) in at least one of the buses comprising said second bus group for multiplying image signals input to said second adder means by a predetermined filter factor whereby to provide filtered image signals at said Y-dimension filter section adder means output.

Claim 7

A multi-dimensional finite impulse response filter having reduced image signal processing steps, comprising in combination: a) an X-dimension filter section (12) including: 1) an image signal buffer series (20-23) for receiving and temporarily storing at least a portion of a line of image signals for filtering thereof, said image signals being input to the first buffer in said buffer series and transmitted through successive ones of the buffers in said buffer series to the buffer series output; 2) adder means (50) for summing signals input thereto; 3) a first bus group (30-33) tapped into the inputs of each buffer in said buffer series and said buffer series output for conducting signals from said buffer series to said adder means input; and 4) multiplier means in at least one of the buses comprising said first bus group for multiplying image signals input to said adder means by a predetermined filter factor; and b) a Y-dimension filter section (14) including: 1) a second image signal buffer series (60, 62) for receiving and temporarily storing at least a portion of a line of image signals from said X-dimension filter section adder means for filtering thereof, said image signals being input to the first buffer of said second buffer series and transmitted through successive ones of the buffers in said second buffer series to said second buffer series output; 2) second adder means (75) for summing signals input thereto; 3) a second bus group (66, 68, 70) tapped into the inputs of each buffer in said second buffer series and said second buffer series output for conducting signals from said second buffer series to said second adder means input; and 4) second multiplier means (65, 67, 69) in at least one of the buses comprising said second bus group for multiplying image signals input to said second adder means by a predetermined filter factor whereby to provide filtered image signals at said Y-dimension filter section adder means output.