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EP0044098A1 Expired / Lapsed EP ⏱️ 0.0 years remaining

System for testing a modem

Assignee: Staat der Nederlanden (Staatsbedrijf der Posterijen Telegrafie en Telefonie)
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Filing: 1981-06-16
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Granted: —
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Expires: 2001-06-16
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Abstract

Abstract System for the remote testing of a modem (12) for two bit rates different from one another, the part for the higher bit rate being connected in the state of testing via a speed converter (14) to the part for the lower bit rate. With the known technique errors will not be detected when the test signal is in the "1" state, because use is made of a pulse lengthener, which extends the "high speed" pulses occurring in the "0" state of the signal, but which does not notice the "high speed" interruptions occurring in the "1" state. This is prevented by the invention by means of a number of logic circuits, one circuit (21) of which is or remains conductive owing to a leading edge of the test signal and a second circuit (25) of which is or remains conductive owing to a trailing edge of the test signal. The other logic circuits ensure that said circuits will be reset (23,27) and that the error information will be processed (29) and supplied (17) to the modem part for the lower bit rate.

Inventors

  • 👤 Peerke Jan Nuhoff

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-11-09 00:02
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/24

Claims Analysis

Total Claims: 1
Claim 1
Independent Claim 210 words
System for the remote testing of a modem for two bit rates different from one another, particularly for viewdata traffic, the part for the higher bit rate being connected in the state of testing via a speed converter to the part for the lower bit rate, characterized by an error detector between the speed converter (14) and the transmission channel of the modem (12) to be tested, which error detector comprises some logic circuits, controlled by delayed clock pulses derived from a test signal, of which logic circuits a first circuit (21) is or remains conductive owing to a leading edge of the test signal, a second circuit (25) is or remains conductive owing to a trailing edge of the test signal, a third circuit (23) serves for resetting the first circuit and a fourth circuit (27) serves for resetting the second circuit, a fifth circuit (29) has an "AND"-function for the outputs of the first and the second circuit, and a sixth circuit (17) has an "EXCL-OR"-function for the output signal of the speed converter (14) and the clocked output (32) of the fifth logic circuit (29), and the clocked output (18) of the sixth logic circuit (17) is connected to the modem part for the lower bit rate.

References Cited (Backward Citations)

US3204189A Cited
US3735271A Cited
GB1376129A Cited

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