EP0043391A1
Expired / Lapsed
EP
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Virtual memory terminal
Assignee: International Business Machines Corp
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Filing: 1980-06-30
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Granted: —
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Expires: 2000-06-30
Abstract
Abstract A microprocessor controlled terminal (1) with keyboard input (4) and CRT display output (6) employs virtual memory and store management techniques to enable an operator to run any of a wide variety of different applications (e.g. text, image, graphics, data entry, reservation, payroll etc.) in the terminal. Application procedure records and data records relating to a selected application are copied as required from a local backing store (14) and/or over a communications link (9) from a main store (16) of central processing unit (12) into a dynamically managed region (20) of random access memory (RAM) (3) under control of primitive microprocessor control instructions permanently held in read-only store (10). In view of the virtual memory techniques employed, the backing store (14) and main store (16) appear to be logical extensions of RAM (3). The records copied to region (20) are contiguously stored as variable length segments in successive free storage locations and are chained together for subsequent access in a plurality of double-threaded chains. Previously marked procedure (and possibly data) are copied from region (20) into directly addressable fixed location (19) of RAM (3) and serve to configure terminal (1) to interact with data and procedure in region (20), in accordance with the requirements of the selected application. Contiguity of segments in region (20), is restored following disruption caused during running of the application. Storage management techniques provide for store-through of segments in RAM (3) to the backing store (14) and main store (16) and identifies segments within RAM (3) available for deletion from RAM on a least-recently-used basis to provide additonal space for new segments.
Inventors
- 👤 Robert Frank Maddock
- 👤 Brian Lawton Marks
- 👤 John Francis Minshull
- 👤 Martin Coxwell Pinnell
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-29 15:21
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/10; G06F12/109; G06F12/1027; G06F12/1045; G06F16/00; G06F16/90; G06F16/901; G06F16/9024
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
279 words
A data processing terminal incorporating a microprocessor, a non-volatile read-only store for storing primitive instruction codes for said microprocessor, and a random access memory for receiving and storing application procedure and data in the form of variable length records, means operable in response to identification of a selected application to be run in said terminal to load procedure records to perform said application and data records to be operated on during execution of said application into said random access memory as required, each record being provided with an individual header and being stored contiguously as variable length segments in successive free storage locations in said random access memory, each segment being linked in accordance with predetermined address pointer rules to other selected segments for subsequent access by means of address pointers inserted in the segment headers, means for identifying and copying selected procedure (and possibly data) into a pre-allocated region of said random access memory, said copied procedure (and possibly data) constituting directly addressable code effective under control of said microprocessor to configure said terminal to interact with data and procedure segments in said random access memory in accordance with the requirements of the selected application, said microprocessor being operable during use to modify segments, and create new segments as required during execution of said application; to delete segments on a priority basis in order to provide additional space in said random access memory; to re-arrange segments so as to restore contiguity of said segments within said random access memory, should this be broken as a result of running said application; and to modify said address pointers as required to maintain the integrity of said predetermined address pointer rules.
Claim 2
Dependent Claim
279 words
A data processing terminal incorporating a microprocessor, a non-volatile read-only store for storing primitive instruction codes for said microprocessor, and a random access memory for receiving and storing application procedure and data in the form of variable length records, means operable in response to identification of a selected application to be run in said terminal to load procedure records to perform said application and data records to be operated on during execution of said application into said random access memory as required, each record being provided with an individual header and being stored contiguously as variable length segments in successive free storage locations in said random access memory, each segment being linked in accordance with predetermined address pointer rules to other selected segments for subsequent access by means of address pointers inserted in the segment headers, means for identifying and copying selected procedure (and possibly data) into a pre-allocated region of said random access memory, said copied procedure (and possibly data) constituting directly addressable code effective under control of said microprocessor to configure said terminal to interact with data and procedure segments in said random access memory in accordance with the requirements of the selected application, said microprocessor being operable during use to modify segments, and create new segments as required during execution of said application; to delete segments on a priority basis in order to provide additional space in said random access memory; to re-arrange segments so as to restore contiguity of said segments within said random access memory, should this be broken as a result of running said application; and to modify said address pointers as required to maintain the integrity of said predetermined address pointer rules.
Claim 3
Dependent Claim
109 words
A data processing terminal as claimed in claim 1, in which said segments are selectively linked to other segments and to associated segment chain headers to form a plurality of segment chains, the segment headers being stored in a predetermined fixed region in random access storage, each header containing the real address of the first and last segment in its associated chain, the address pointer in each segment containing the real address of preceding and succeeding segments in the chain, whereby a segment in a selected chain may be accessed by means of a progressive logical search through the chain starting with the segment header associated with that chain.
Claim 4
Dependent Claim
81 words
A data processing terminal as claimed in claim 2, in which said segment chains include a plurality of access chains by means of which all segments in said random access memory are linked for subsequent access, an access chain header containing the real address of the first and last segments in its chain being provided for each access chain and each segment header including an access pointer field containing the real addresses of preceding and succeeding segments in the associated chain.
Claim 5
Dependent Claim
67 words
A data processing terminal as claimed in claim 3, in which each segment is labelled with a predetermined segment identifier inserted in its header, and the access chain with which a segment is to be associated, or is already associated, being determined by means of a hashing operation on said segment identifier, said hashing operation being effective to distribute segments randomly over the plurality of access chains.
Claim 6
Dependent Claim
46 words
A data processing terminal as claimed in any one of the preceding claims, operable under control of said microprocessor to copy selected data and procedure records from and to said random access memory to or from one or more auxilliary storage units associated with said terminal.
Claim 7
Dependent Claim
33 words
A data processing terminal as claimed in claim 5, in which said auxilliary storage units comprise a local backing store and/or a remote main store forming part of an independent central processing unit.
Claim 8
Dependent Claim
103 words
A data processing terminal as claimed in claim 6 and in claim 2, in which said segment chains include a plurality of control chains by means of which the status of all segments in random access memory is made available to said microprocessor and by which they are identified for subsequent access, each control chain having a control chain header containing the real addresses of the first and last segments in its chain, and each segment linked to a control chain having a segment header including a control pointer field containing the real addresses of preceding and succeeding segments in that associated chain.
Claim 9
Dependent Claim
62 words
A data processing terminal as claimed in claim 7, in which said control chains include a plurality of hold chains each serving to link segments in queues indicating their availability for copy between said random access memory, the local backing store, and remote main store; and a least-recently-used chain maintaining a list of segments available for deletion from said random access memory.
Claim 10
Dependent Claim
71 words
A data processing terminal as claimed in claim 8, in which segments for linking in said least-recently-used chain are inserted in the chain at approximately mid-way through the list of segments in the chain, means operable following access of a segment held in said least-recently-used chain to promote the segment to the head of the chain whereby segments least recently used by said application migrate to the foot of the chain.
Claim 11
Dependent Claim
89 words
A data processing terminal as claimed in any one of the preceding claims, in which predetermined fixed locator regions are allocated in random access memory for storing real addresses of pre-selected segments, the headers of segments including an additional address field indicating an association or otherwise with said locator regions and, if such an association exists, for storing the real addresses of said associated locator, searches for segments being initiated simultaneously in response to segment requests from said microprocessor controller through said locator regions and said segment chain headers.
References Cited (Backward Citations)
GB1504112A
Cited
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