EP0042977A1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Batch placement system for electronic components or chips
Assignee: International Business Machines Corp
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Filing: 1981-05-25
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Granted: —
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Expires: 2001-05-25
Abstract
Abstract A batch chip placement system and method for positioning semiconductor chips (24A, B, C) or the like upon a substrate (15) containing an array of chip sites or footprints whose actual position on the substrate deviates from the theoretical or nominal position over successive substrates. The positioning is achieved by first sensing the X and Y offsets of a pair of alignment marks (15A, 15N) on the substrate from their theoretical or nominal position to determine the AX and ΔY correction factors required to obtain the actual X/Y position of the alignment marks. The actual X/Y position of the alignment marks is used to determine actual X/Y chip position values, 6 rotation and shrinkage factor corrections required to obtain proper orientation and positioning for batch chip placement.
Inventors
- 👤 George Anthony Caccoma
- 👤 Joseph Henry Koestner
- 👤 Brian Collins O'neill
- 👤 Frank Muir Tappen
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-05 09:10
CPC Classifications
H; H10; H10P; H10P72/00; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49133; Y10T29/49764; Y10T29/49769; Y10T29/49826; Y10T29/49895; Y10T29/53; Y10T29/5313; Y10T29/53174; Y10T29/53178; Y10T29/53261
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
177 words
A batch placement system (1) for the positioning of electronic components or chips (24) at preassigned sites on a substrate (15) where the sites vary in position from substrate to substrate, said substrate having at least one pair of alignment marks (15A, 15N) thereon, characterized by optical means (29) for locating the actual position of said pair of alignment marks on said substrate, means (16) to compare the actual position of said pair of alignment marks with the theoretical position of said marks to determine the amount of misalignment, a plurality of chip locator means (73, 77, 79), each one of which is arranged to align and locate a chip thereon, means (9) to position chips on each of said plurality of chip locator means, means (81, 83, 85, 89, 91) to individually position each of said plurality of chip locator means in accordance with said amount of misalignment, and chip pickup means (11) to remove said chips from each of said plurality of chip locator means and position same at said pre-arranged sites upon said substrate.
Claim 2
Dependent Claim
177 words
A batch placement system (1) for the positioning of electronic components or chips (24) at preassigned sites on a substrate (15) where the sites vary in position from substrate to substrate, said substrate having at least one pair of alignment marks (15A, 15N) thereon, characterized by optical means (29) for locating the actual position of said pair of alignment marks on said substrate, means (16) to compare the actual position of said pair of alignment marks with the theoretical position of said marks to determine the amount of misalignment, a plurality of chip locator means (73, 77, 79), each one of which is arranged to align and locate a chip thereon, means (9) to position chips on each of said plurality of chip locator means, means (81, 83, 85, 89, 91) to individually position each of said plurality of chip locator means in accordance with said amount of misalignment, and chip pickup means (11) to remove said chips from each of said plurality of chip locator means and position same at said pre-arranged sites upon said substrate.
Claim 3
Dependent Claim
50 words
The batch placement system of claim 1, further comprising batch chip feed means including a plurality of parallel feed banks (7A - 7C) which act to feed chips (24) via tracks to respective ones of a plurality of parallel chip pockets (8A - 8C), whereby said chips are coarsely located.
Claim 4
Dependent Claim
54 words
The batch placement system of claim 2, wherein the means to position chips on each of said plurality of chip locator means comprise parallel vacuum pickup means (9) for picking up in parallel the respective chips (24) located in the plurality of parallel chip pockets (8A - 8C) of the batch chip feed means.
Claim 5
Dependent Claim
17 words
The batch placement system of claim 1, wherein the optical means (29) includes a vidicon camera (39).
Claim 6
Dependent Claim
44 words
The batch placement system of claim 1, wherein the difference between the actual position of the pair of alignment marks (15A, 15N) and their theoretical position is used to determine the variation in orientation of said actual alignment marks from said theoretical alignment marks.
Claim 7
Dependent Claim
35 words
The batch placement system of claim 1, wherein the difference between the actual positions of the pair of alignment marks (15A, 15N) is used to determine the amount of shrinkage encountered by the substrate (15).
Claim 8
Dependent Claim
44 words
The batch placement system of claim 5 or 6, wherein the plurality of chip locator means (73, 77, 79) are positioned by the means (81, 83, 85, 89, 91) to individually position in accordance with the variation in orientation and the amount of shrinkage.
Claim 9
Dependent Claim
58 words
The batch placement system of claim 7, wherein the plurality of chip locator means (73, 77, 79) of the batch compensator means are arrayed in a row and wherein means are provided to position each of said chip locator means (77, 79) other than one of said chip locator means (73) to correct for the amount of shrinkage.
Claim 10
Dependent Claim
22 words
The batch placement system of claim 8, wherein the one of the chip locator means (73) is the center chip locator means.
Claim 11
Dependent Claim
49 words
The batch placement system of claim 1, wherein each of the plurality of chip locator means (73, 77, 79) includes a recess having tapered walls arranged to cause solder balls (26) on one side of a chip (24) to slide thereon to finely locate said chip within said recess.
References Cited (Backward Citations)
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