EP0042305A2
Expired / Lapsed
EP
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MOS transistor circuit with breakdown protection
Assignee: Toshiba Corp
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Filing: 1981-06-17
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Granted: —
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Expires: 2001-06-17
Abstract
Abstract A protected MOS transistor circuit includes an input (or output) MOS transistor (1) and a protective circuit (10) including a depletion mode MOS transistor (TrP) having a drain-source current path connected between ground and the gate of the MOS transistor and arranged to prevent breakdown of the gate oxide of the protected MOS transistor when power is off as a consequence of stray voltages. When power is on, the depletion mode MOS transistor's gate receives a control signal which renders the depletion mode MOS transistor non-conductive but, when power is off, the depletion mode transistor is conductive so as to ground currents caused by the stray voltages.
Inventors
- 👤 Masamichi Asano
- 👤 Hiroshi Iwahashi
- 👤 Ichiro Kobayashi
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-30 00:15
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/003; H03K19/00315; H03K17/00; H03K17/08; H03K17/081; H03K17/0812; H03K17/08122; H03K19/0008; H03K19/0013; H03K19/0016; H10; H10D; H10D30/00; H10D30/60; H10D89/00; H10D89/60; H10D89/601
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
86 words
A protective circuit for an MOS transistor circuit of the kind having a region which is susceptible to damage caused by the accidental application of stray voltages to a terminal of the device when the transistor is not in operation, the protective circuit including a device connected to the said terminal and having a first state, when power is on, in which energy is not absorbed via the device, and a second state, when power is off, in which energy is absorbed via the said device.
Claim 2
Dependent Claim
86 words
A protective circuit for an MOS transistor circuit of the kind having a region which is susceptible to damage caused by the accidental application of stray voltages to a terminal of the device when the transistor is not in operation, the protective circuit including a device connected to the said terminal and having a first state, when power is on, in which energy is not absorbed via the device, and a second state, when power is off, in which energy is absorbed via the said device.
Claim 3
Dependent Claim
31 words
A protective circuit according to claim 1, in which the said device is a switching device, the first state being an "off" state and the second state being an "on" state.
Claim 4
Dependent Claim
38 words
A protective circuit according to claim 2, in which the switching device is arranged to connect the said input or output to a reference voltage level in its "on" state and to disconnect it in its "off" state.
Claim 5
Dependent Claim
48 words
A protective circuit according to claim 2 or claim 3, in which the switching device is operated in response to a control signal which is less than the threshold voltage of the switching device when power is on and greater than the said voltage when power is off.
Claim 6
Dependent Claim
17 words
A protective circuit according to any preceding claim, in which the protective device is an MOS transistor.
Claim 7
Dependent Claim
16 words
A protective circuit according to claim 5, in which the transistor is a depletion mode transistor.
Claim 8
Dependent Claim
30 words
A protective circuit according to claim 6, in which the control signal comprises the substrate voltage of an integrated circuit in which the transistor circuit and protective circuit are formed.
Claim 9
Dependent Claim
32 words
A protective circuit according to claim 6, further comprising means for generating a control signal which is different from the substrate voltage of integrated circuit in which the protective circuit is formed.
Claim 10
Dependent Claim
30 words
A protective circuit acording to claim 7 or claim 8, further comprising means for varying the conductivity of the said transistor in accordance with current surges at the protected terminal.
Claim 11
Dependent Claim
18 words
A protective circuit according to claim 9, in which the means for varying the conductivity is a capacitor.
Claim 12
Dependent Claim
36 words
An MOS transistor circuit having a protective circuit according to any preceding claim, connected to its input electrode, and further comprising a resistor connected between the input terminal of the circuit and the said input electrode.
Claim 13
Dependent Claim
21 words
An MOS transistor circuit having a protective circuit according to any of claims 1 to 10, connected to its output terminal.
Claim 14
Dependent Claim
27 words
An MOS transistor circuit according to claim 12, in which the output electrode of the MOS transistor is connected to the said output terminal via a resistor.
Claim 15
Dependent Claim
102 words
An MOS transistor circuit according to any of claims 6 to 10 with claim 11 or any of claims 6 to 10 with claim 12, wherein said conductivity varying means further comprises an enhancement mode MOS transistor having a source-drain current path connected between said gate of said depletion mode transistor and said control signal generating means, and a gate, and means for generating a second control signal when power is on, said enhancement mode transistor gate being responsive to said second control signal to render said enhancement mode MOS transistor conductive when power is on and non-conductive when power is off.
Claim 16
Dependent Claim
47 words
An MOS transistor circuit according to claim 14, wherein said conductivity varying means further comprises another enhancement mode MOS transistor having a source-drain current path connected between said gate of said depletion mode MOS transistor and said receiving means, and a gate connected to said receiving means.
Claim 17
Dependent Claim
64 words
An MOS transistor circuit according to claim 15, wherein said other enhancement mode transistor has a threshold above which it conducts; and said control signal generating means generates said control signal such that the absolute value of the difference between a maximum value of said input signal and said control signal is less than the absolute value of said threshold when power is on.
Claim 18
Dependent Claim
61 words
An MOS transistor circuit according to claim 14, wherein said changing means further comprises a plurality of enhancement'mode MOS transistors each having a source, a drain and a gate connected to the drain, the source-drain current paths of said plurality of enhancement mode transistors being connected in series between said gate of the depletion mode MOS transistor and said receiving means.
Claim 19
Dependent Claim
84 words
An MOS transistor circuit according to claim 14, wherein each of said plurality of enhancement mode transistors has a threshold above which each of said plurality of enhancement mode transistors conduct; and said control signal generating means generates said control signals such that the absolute value of the difference between a maximum value of said input signal and said control signal is less than the sum of the absolute values of said thresholds of said plurality of enhancement mode transistors when power is on.
References Cited (Backward Citations)
No citation records indexed.
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