Solid state image sensor

Claim 2

A solid state image sensor, comprising photosensing means (12) for generating a signal charge (46) in an amount corresponding to the intensity of a received picture light (44) and gate means (16) for reading out the signal charge generated by at least said photosensing means (12), characterized by further comprising signal-generating means (50, 110, 112) for generating at least one electrical signal having a prescribed voltage waveform, and storage means (20) connected to said signal-generating means (50, 110, 112) for trapping a prescribed amount of the signal charge generated by said photosensing means (12) in response to the electrical signal for a predetermined period of time.

Claim 3

A solid state image sensor according to claim 1, characterized in that said photosensing means (12) is mounted on one surface of a semiconductor substrate (22), having one conductivity type, and comprises a semiconductor layer (26) having a conductivity type opposite to that of said semiconductor substrate (22); and said storage means (20) comprises an electrode (30) which is partly overlaid on said semiconductor layer (26) and also connected to said signal-generating means (50, 110, 112).

Claim 4

.3. A solid state image sensor according to claim 1, characterized in that said signal-generating means is formed of a signal generator (50) for producing first and second control signals (φ LC , φ tC ) having a prescribed waveform; said storage means (20) traps the signal charge in response to the first control signal (φ LC ); and said gate means (16) allows for the reatout of a signal charge generated by said photosensing means (12) and a signal charge trapped by said storage means (20) in response to the second control signal (' tC ).

Claim 5

A solid state image sensor according to claim

Claim 6

3, characterized in that the first and second control signals are pulse signals (φ LC , ' tC ) which are retained at the same prescribed level for different lengths of time (T LCt Tt C ); and said storage means (20) traps such an amount of a signal charge as corresponds to a difference between the sustenance periods (T LC , Tt C ) of the control pulse signals (φ LC , φ tC ).

Claim 7

3, characterized in that the first and second control signals are pulse signals (φ LC , ' tC ) which are retained at the same prescribed level for different lengths of time (T LCt Tt C ); and said storage means (20) traps such an amount of a signal charge as corresponds to a difference between the sustenance periods (T LC , Tt C ) of the control pulse signals (φ LC , φ tC ).

Claim 8

A solid state image sensor according to claim 3, characterized in that the first and second control signals are pulse signals (φ LC , φ tC ) having different voltage levels; and said storage means (20) traps such an amount of a signal charge as corresponds to a difference between the voltage levels of the first and second control pulse signals (φ LC , φ tC ).

Claim 9

A solid state image sensor according to claim 3, characterized in that the first control signal is a D .C. signal having a prescribed voltage level (V DC ); the second control signal is a pulse signal (φ tC ) which is sustained at a prescribed voltage level for a predetermined period of time; and said storage means (20) traps such an amount of a signal charge as corresponds to the sustenance period of the control pulse signal (φ tC ).

Claim 10

A solid state image sensor, comprising a semiconductor substrate (22) having a first conductivity type, photosensing means (12) which is mounted on one surface of said semiconductor substrate (22), includes a semiconductor layer (26) having a second conductivity type, and generates in said semiconductor substrate (22) such an amount of a signal charge (46) as corresponds to the intensity of a received picture light (44), an insulating layer (28) deposited on the surface of said semiconductor substrate (22) with a prescribed thickness, and gate means (16) which includes a gate electrode (32) fromed on the insulating layer (28) in the proximity of the other end of said semiconductor layer (26) and connected to a signal-generating means (50, 110, 112) for generating at least two kinds of electrical signals, and controls the readout of a signal charge trapped in at least the photosensing means (12) in response to one electrical signal (O tC ) from the signal-generating means (50, 110), characterized by further comprising storage means (20) which is deposited on said insulating layer (28), part of which spatially faces the upper portion of one end of said semiconductor layer (22), which includes a lag control electrode (30) connected to the signal-generating means (50, 110, 112), and traps part of a signal charge generated in said semiconductor substrate (22) in response to the other electrical signal (O LC Y from the signal-generating means (50, 110, 112) in interface states between that portion of said semiconductor layer (22) which less below the lag control electrode (30) and said insulating layer (28).

Claim 11

A solid state image sensor, comprising a semiconductor substrate (22) having a first conductivity type, photosensing means (12) which is mounted on one surface of said semiconductor substrate (22), includes a semiconductor layer (26) having a second conductivity type, and generates in said semiconductor substrate (22) such an amount of a signal charge (46) as corresponds to the intensity of a received picture light (44), an insulating layer (28) deposited on the surface of said semiconductor substrate (22) with a prescribed thickness, and gate means (16) which includes a gate electrode (32) fromed on the insulating layer (28) in the proximity of the other end of said semiconductor layer (26) and connected to a signal-generating means (50, 110, 112) for generating at least two kinds of electrical signals, and controls the readout of a signal charge trapped in at least the photosensing means (12) in response to one electrical signal (O tC ) from the signal-generating means (50, 110), characterized by further comprising storage means (20) which is deposited on said insulating layer (28), part of which spatially faces the upper portion of one end of said semiconductor layer (22), which includes a lag control electrode (30) connected to the signal-generating means (50, 110, 112), and traps part of a signal charge generated in said semiconductor substrate (22) in response to the other electrical signal (O LC Y from the signal-generating means (50, 110, 112) in interface states between that portion of said semiconductor layer (22) which less below the lag control electrode (30) and said insulating layer (28).

Claim 12

A solid state image sensor according to claim 7, which includes charge shift means (14) connected to said gate means (16) for supplying a signal charge read out by said gate means (16) to an output terminal (52) of the image sensor, characterized in that said charge shift means (14) comprises a charge shift electrode (34) formed on said insulating layer (28) in the proximity of said gate electrode (32) and a channel layer (24) formed with the second conductivity type below that portion of the surface of said semiconductor substrate (22) which faces the charge shift electrode (34) across said insulating layer (28).

Claim 13

A solid state image sensor according to claim 7 or 8, characterized in that said charge shift electrode (34) is constituted by substantially divided electrode sections (122, 124), one of said devided electrode sections (122, 124) being integrally formed with said lag control electrode (30) and the other of said devided electrode sections (122, 124) being integrally formed with the gate electrode (32).