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EP0036111A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Method for making fine deep dielectric isolation

Assignee: International Business Machines Corp
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Filing: 1981-02-25
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Granted: —
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Expires: 2001-02-25
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Abstract

Abstract The invention relates to a method for making fine, deep dielectric isolation. The method involves forming a first layer (16) of material on the silicon body (10, 12, 14) over a first set of alternately designated device regions. A conformal coating (18) is deposited over the first layer (16) and on the silicon body (10,12,14) included in a second set of alternately designated device regions and the designated isolation regions. The thickness of conformal coating (18) is chosen to be substantially the width of the planned isolation between device regions. A second layer (20) is then deposited over conformal coating (18). First layer (16) and conformal coating (18) are composed of different materials. The topmost surface comprising of second layer (20) and conformal coating (18) is planarized by removing partially second layer (20) and conformal coating (18)from first layer (16) wherein the second set of alternately designated device regions in silicon body (10,12,14) are covered by conformal coating (18) and second layer (20) with portions of the conformal coating separating the covers for the first and second set of device regions. The portions of conformal coating (18) separating the covers are removed down to the silicon body (14) over the designated isolation regions. A groove (22) is then etched in the silicon body (10,12,14) using the covers as the etch mask. The groove (22) is etched to the desired depth of the dielectric isolation in the designated isolation regions and then is filled typically by thermal oxidation.

Inventors

  • 👤 Krishnamur Venkataraman
  • 👤 Bob Hong Yun

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-30 03:49
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/10; H10W10/13; H10P; H10P50/00; H10P50/69; H10P50/691; H10P50/693; H10P50/696; H10P76/00; H10P76/40; H10P76/408; H10P76/4085; H10P76/4088; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; Y; Y10; Y10S; Y10S148/00; Y10S148/051; Y10S148/085; Y10S148/117; Y10S148/131; Y10S438/00; Y10S438/942; Y10S438/947

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 8 words
Method for making fine, deep dielectric isolation (22,
Claim 2
Dependent Claim 8 words
Method for making fine, deep dielectric isolation (22,
Claim 3
Dependent Claim 190 words
28) in a silicon body (10, 12, 14) comprising the following steps: a) forming a first layer (16) of material on silicon body (10, 12, 14) over a first set of alternately designated device regions; b) depositing a conformal coating (18) over layer (16) and on silicon body (10, 12, 14) in a second set of alternately designated device regions and the designated isolation regions (22, 28) in a thickness which is substantially the planned width of isolation (22, 28); c) depositing a second layer (20) over conformal coating (18); d) planarizing the surface by removing second layer (20) and conformal coating (18) until first layer (16) is reached; e) removing the portions of conformal coating (18) separating the covers over the first and second sets of device regions down to silicon body (10, 12, 14) in the designated isolation regions (22, 28); f) etching a groove (22) in silicon body (10, 12, 14) using the covers as an etch mask to the desired depth of dielectric isolation (28) in the designated isolation regions (22, 28); and g) filling groove (22) with dielectric material to form deep dielectric isolation (28).
Claim 4
Dependent Claim 190 words
28) in a silicon body (10, 12, 14) comprising the following steps: a) forming a first layer (16) of material on silicon body (10, 12, 14) over a first set of alternately designated device regions; b) depositing a conformal coating (18) over layer (16) and on silicon body (10, 12, 14) in a second set of alternately designated device regions and the designated isolation regions (22, 28) in a thickness which is substantially the planned width of isolation (22, 28); c) depositing a second layer (20) over conformal coating (18); d) planarizing the surface by removing second layer (20) and conformal coating (18) until first layer (16) is reached; e) removing the portions of conformal coating (18) separating the covers over the first and second sets of device regions down to silicon body (10, 12, 14) in the designated isolation regions (22, 28); f) etching a groove (22) in silicon body (10, 12, 14) using the covers as an etch mask to the desired depth of dielectric isolation (28) in the designated isolation regions (22, 28); and g) filling groove (22) with dielectric material to form deep dielectric isolation (28).
Claim 5
Dependent Claim 23 words
Method of claim 1, characterized in that first layer (16) and second layer (20) are composed of different materials than conformal coating (18).
Claim 6
Dependent Claim 32 words
Method of claims 1 and 2, characterized in that first layer (16) is formed of silicon nitride, conformal coating (18) of silicon dioxide and second layer (20) is formed of plastic material.
Claim 7
Dependent Claim 22 words
Method of claims 1 to 3, characterized in that conformal coating (20) is deposited in a thickness between 100 and 1000 nm.
Claim 8
Dependent Claim 22 words
Method of claims 1 and 3, characterized in that a thin silicon dioxide layer is formed under silicon nitride first layer (16).
Claim 9
Dependent Claim 71 words
Method of claims 1 to 3, characterized in that a plastic material is spin coated onto conformal coating (18) to form second layer (20) and that the surface is planarized by first removing a portion of plastic layer (20) by ashing until the higher regions of conformal coating (18) are reached and then reactive ion etching plastic layer (20) and conformal coating (18) until silicon nitride first layer (16) is reached.
Claim 10
Dependent Claim 45 words
Method of claims 1 and 6, characterized in that the remaining conformal coating (18) between the covers over the first and second set of device regions is removed by a buffered hydrofluoric acid and that the.etching of groove (22) is done by reactive ion etching.
Claim 11
Dependent Claim 46 words
Method of claims 1 and 7, characterized in that a P+ implant is made at the bottom (24) of groove (22) and that groove (22) is filled by thermal oxidation of the silicon body (10, 12, 14) in the region of groove (22) to silicon dioxide.
Claim 12
Dependent Claim 35 words
Method of one or several of the preceding claims, characterized in that a silicon body (10, 12, 14) containing a layer (12) of highly doped silicon with groove (22) extending through this layer is used.
Claim 13
Dependent Claim 21 words
Method of claim 9, characterized in that a P-doped silicon body (10) and a highly N+ doped layer (12) is used.
Claim 14
Dependent Claim 28 words
Method of one or several of the preceding claims, characterized in that bipolar transistors or field effect transistors are located in at least some of the device regions.

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