A method of manufacturing a semiconductor device having reduced leakage currents
Abstract
Abstract A method of fabricating semiconductor integrated circuits devices in which leakage currents at the junction and at the surface are substantially reduced. The shallow source and drain regions are formed by ion implantation of arsenic. An insulating layer of phosphosilicate glass (PSG) is formed on the entire surface of the semiconductor substrate, windows are cut through the PSG layer to form windows for contacts or electrodes. Oxygen ions having the effect of gettering defects are ion implanted through these windows into the surface of source and drain regions and the PSG layer is thermally melted to offer MOS memory devices, other MOS devices or bipolar transistors.
Inventors
- 👤 Hiroyuko Ikubo
- 👤 Kunihiko Wada
Bibliographic Details
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