Operational amplifier in IG-FET technology

Abstract

Abstract Operational IG-FET amplifier with attenuation of the common-mode components of the input signals (P15, P16), -comprising a differential amplifier which contains three current branches with one depletion-type drain resistor (3, 4, 300) each and at least one enrichment-type amplifier FET (1, 2, 200, 100), the gates of the first amplifier FET (1) in the first current branch and of the third amplifier FET (2) in the third current branch being connected to the first signal input (P15), the gate of the second amplifier FET (100) in the second current branch being connected to the second signal input (P16) and its drain being connected (via P10) to the operational amplifier output (Aus), the third amplifier FET (2) being bypassed by a fourth enrichment-type amplifier FET (200), the gate of which is connected to the second signal input (P16), and a common enrichment-type source resistor (5) being used as current source, -comprising a common-mode feedback circuit which contains a first amplifier stage with a first FET (6/18) and second enrichment-type FET (7/20), the gate of the first FET (6/18) being connected to the drain of the third amplifier FET (2) and the gate of the second FET (7/20) being connected to a bias voltage (P4/P5) and its drain being connected to the gate of the source resistor (5). At the same time, the first amplifier stage (6, 7) forms the bias voltage generator (18, 20) by the drain of the second FET (7/20) being connected to the gate of this second FET (7/20) (Fig. 2) and/or of the first FET (6/18) being of the depletion type (Fig. 2). <IMAGE>

Inventors

• 👤 Bernward Dipl.-Ing. Rössler

Bibliographic Details