EP0025801A1
Expired / Lapsed
EP
⏱️ 0.0 years remaining
Access system for memory modules
Assignee: Panafacom Ltd
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Filing: 1980-10-23
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Granted: —
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Expires: 2000-10-23
Abstract
Abstract An access system for memory modules (47'-0 to 47'-31) by using an effective address which consists of more than two portions wherein one portion is determined later than other portions. The system comprises first means (41-1) for storing one portion in the present effective address, second means (41-2) for storing other portions in the present effective address third means (41-3) for storing the one portion in a previous effective address, and means (48) for comparing the content of the first means with the content of the third means. In the system, practical access to the memory modules is performed before the whole of the present effective address is determined.
Inventors
- 👤 Takao Imura
- 👤 Shigeru Koyanagi
- 👤 Yoshihiro Joda
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-11-06 20:12
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/0215
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
227 words
A system for accessing memory modules by using an effective address composed of first, second and third parts, the first and second parts being determined later than the third part, comprising: a first means for storing first and second parts of a current effective address; a second means for storing a third part of said current effective address; a third means for storing a first part of a previous effective address, and; means for comparing the first part of said current effective address stored in said first storing means with the first part of said previous effective address stored in said third storing means when the first and second parts of said current effective address are determined, whereby said memory modules are accessed by using the first part of said previous effective address and the third part of said current effective address and, after that, when the first parts of said previous and current effective addresses are determined to be different from each other by said comparing means, said memory modules are again accessed by using the first, second and third parts of said current effective address, while, when the first parts of said previous and current effective addresses are determined to be the same as each other by said comparing means, said memory modules are accessed by using the second part of said current effective address.
Claim 2
Independent Claim
227 words
A system for accessing memory modules by using an effective address composed of first, second and third parts, the first and second parts being determined later than the third part, comprising: a first means for storing first and second parts of a current effective address; a second means for storing a third part of said current effective address; a third means for storing a first part of a previous effective address, and; means for comparing the first part of said current effective address stored in said first storing means with the first part of said previous effective address stored in said third storing means when the first and second parts of said current effective address are determined, whereby said memory modules are accessed by using the first part of said previous effective address and the third part of said current effective address and, after that, when the first parts of said previous and current effective addresses are determined to be different from each other by said comparing means, said memory modules are again accessed by using the first, second and third parts of said current effective address, while, when the first parts of said previous and current effective addresses are determined to be the same as each other by said comparing means, said memory modules are accessed by using the second part of said current effective address.
Claim 3
Dependent Claim
49 words
A system as set forth in claim 1, further comprising a multiplexer means for transmitting the third part of said current effective address stored in said second storing means and the second part of said current effective address stored in said first storing means to said memory modules time-divisionally.
Claim 4
Dependent Claim
45 words
A system as set forth in claim 1, wherein the first part of said effective address designates the selection of said memory modules and the second and third parts of said effective address designate the selection of memory cells in each of said memory modules.
Claim 5
Dependent Claim
71 words
A system as set forth in claim 3, further comprising: a first decoder means for decoding the first part of said current effective address stored in said first storing means, so as to select one module from said memory modules, and; a second decoder means for decoding the first part of said previous effective address stored in said third storing means, so as to select one module from said memory modules.
References Cited (Backward Citations)
No citation records indexed.
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