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EP0004292A2 Expired / Lapsed EP ⏱️ 0.0 years remaining

Process of making a MESA bipolar transistor with self-aligned base and emitter regions

Assignee: International Business Machines Corp
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Filing: 1979-02-23
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Granted: —
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Expires: 1999-02-23
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Abstract

Abstract This transistor is formed from a conventional structure comprising a substrate (21), a subcollector region (22) associated with a collector passage region (24), an epitaxial layer (20) serving as collector region and a base layer (26) and insulating walls (23). In a preferred embodiment, an emitter layer (27) is formed on the base layer. A masking layer (28) is then formed on the emitter layer; it defines an opening around the region intended to constitute the emitter. The exposed parts of the structure are attacked; this accurately defines the emitter region (27), and the base region (26). Ion implantation is then employed to form the base contact region (32). The emitter, base and base contact regions are thus self-aligned. The structure is passivated by the regions of embedded oxide (33). Finally, the required resistive contacts are formed. This process permits the production of very fast transistors having a high density of integration which are useful in applications for computers. <IMAGE>

Inventors

  • 👤 Tak Hung Ning
  • 👤 Hwa-Nien Yu

Bibliographic Details

Application Number —
Jurisdiction EP
Data Source google_patents
Last Synchronized 2026-10-29 17:16
CPC Classifications
H; H10; H10P; H10P76/00; H10P76/40; H10D; H10D10/00; H10D10/40; H10D10/441; H10D62/00; H10D62/10; H10D62/17; H10D62/177

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