A method of and an apparatus for a radiotelephone communications system

Claim 1

A telephone system comprising: (a) a land-line telephone system (20 of Fig. I) including a land-line switching network for providing communication paths to a plurality of land-line telephones; and (b) a mobile radiotelephone system (30, 40, 50 and 60 of Fig. 1) coupled to the land-line switching network for providing communication paths between mobile radiotelephones and between mobile radiotelephones and land-line telephones, said mobile radiotelephone system including: (i) a plurality of base stations (160 of Fig. 1), each of the base stations providing communication paths to mobile radiotelephones in the vicinity thereof; (ii) a digital switching network (40 of Fig. 1) for switching between a predetermined number of pairs of incoming and outgoing serial pulse-code- modulated (PCM) bit streams, each serial PCM bit stream having a plurality of PCM frames of a predetermined number of PCM channels, each PCM channel having corresponding message bits and signal bits; (iii) PCM analog-to-digital (A/D) and digital-to-analog (D/A) converters (30 of Fig. 1) interposed between the digital switching network and the respective base stations and between the digital switching network and the land-line network, said PCM A/D and D/A converters having analog ports, each analog port corresponding to a pre-established incoming and outgoing PCM channel; and said digital switching network (40 of Fig. 1) including: (i) a multiplexer (41 of Fig. 1) for multiplexing the predetermined number of the incoming serial PCM bit streams to provide an incoming parallel bit stream, having a time slot corresponding to each PCM channel in the predetermined number of incoming serial PCM bit streams; (ii) time-slot-interchange means (42 of Fig. 1) for interchanging the incoming PCM channels in the incoming parallel bit stream according to an ordering of time slots in a routing memory to provide an outgoing parallel bit stream; and (iii) a demultiplexer (41 of Fig. 1) for demultiplexing the outgoing parallel bit stream to provide the predetermined number of outgoing serial bit streams; and characterized in that in said digital switching network: (a) signal multiplexing means (41 of Fig.1) are provided for multiplexing incoming signal bits for each PCM channel from the incoming serial PCM bit streams onto an incoming signal bit stream in accordance with the time slot for the PCM channel; (b) signal detecting means (42 of Fig. 1) are provided for sensing the incoming signal bits from the incoming serial bit stream for each of the respective incoming PCM channels; (c) signal storing means (805 of Fig. 10) are provided for storing the sensed incoming signal bits for each PCM channel; (d) signal processing means (50 of Fig. I) are provided to process the stream of signal bits for ordering the time slots in the routing memory to route incoming PCM channels to selected outgoing PCM channels; (e) said time-slot-interchange means (42 of Fig. 1) is responsive to the ordering of time slots in the routing memory for coupling the incoming PCM channels to corresponding selected outgoing PCM channels; (f) said signal processing means (50 of Fig. 1) is responsive to the sensed incoming signal bits for generating corresponding outgoing signal bits adapted to a pre-established format recognizable by the outgoing PCM channels; and (g) means (41 and 42 of Fig. 1) are provided for applying the outgoing signal bits to the outgoing parallel bit stream.

Claim 14

A method of processing signals through a digital switching network (40 of Fig. 1) having a time-slot interchanger (42 of Fig. 1) for switching incoming PCM channels from incoming to outgoing serial pulse-code-modulated (PCM) bit streams in accordance with an ordering of time slots in a routing memory, each serial PCM bit stream being formatted in a plurality of frames, each frame having a predetermined number of PCM channels that have corresponding message bits and signal bits, a predetermined number of said frames being formatted in a multiframe, and each PCM channel having a predetermined time slot, wherein said method includes improvement for processing the signal bits from the serial PCM bit streams characterized by the steps of: detecting (307 of Fig. 3) incoming multiframesynchronization for each incoming serial PCM bit stream; storing in consecutive order in corresponding first-in first-out (FIFO) memories (304 of Fig. 3) the incoming signal bits for each serial PCM bit stream in response to said detecting step; reading out of the FIFO memories (304 of Fig. 3) the stored incoming signal bits; and multiplexing the read-out incoming signal bits for each PCM channel onto the incoming signal bit stream in accordance with the time slot of the respective PCM channel; sensing the incoming signal bits from the incoming signal bit stream for each of the respective incoming PCM channels; ordering the time slots in the routing memory (702 of Fig. 9) in response to the sensed incoming signal bits; applying the ordering of time slots in the routing memory (702 of Fig. 9) to the time-slot interchanger (506, 507, 508, 509 and 510 of Fig. 5) for enabling incoming PCM channels to be routed to selected outgoing PCM channels; and generating (50 of Fig. 1) outgoing signal bits corresponding to the incoming signal bits but adapted to a pre-established format recognizable by the outgoing PCM channels.

Claim 15

A method of processing signals through a digital switching network (40 of Fig. 1) having a time-slot interchanger (42 of Fig. 1) for switching incoming PCM channels from incoming to outgoing serial pulse-code-modulated (PCM) bit streams in accordance with an ordering of time slots in a routing memory, each serial PCM bit stream being formatted in a plurality of frames, each frame having a predetermined number of PCM channels that have corresponding message bits and signal bits, a predetermined number of said frames being formatted in a multiframe, and each PCM channel having a predetermined time slot, wherein said method includes improvement for processing the signal bits from the serial PCM bit streams characterized by the steps of: detecting (307 of Fig. 3) incoming multiframesynchronization for each incoming serial PCM bit stream; storing in consecutive order in corresponding first-in first-out (FIFO) memories (304 of Fig. 3) the incoming signal bits for each serial PCM bit stream in response to said detecting step; reading out of the FIFO memories (304 of Fig. 3) the stored incoming signal bits; and multiplexing the read-out incoming signal bits for each PCM channel onto the incoming signal bit stream in accordance with the time slot of the respective PCM channel; sensing the incoming signal bits from the incoming signal bit stream for each of the respective incoming PCM channels; ordering the time slots in the routing memory (702 of Fig. 9) in response to the sensed incoming signal bits; applying the ordering of time slots in the routing memory (702 of Fig. 9) to the time-slot interchanger (506, 507, 508, 509 and 510 of Fig. 5) for enabling incoming PCM channels to be routed to selected outgoing PCM channels; and generating (50 of Fig. 1) outgoing signal bits corresponding to the incoming signal bits but adapted to a pre-established format recognizable by the outgoing PCM channels.

Claim 20

A method for looping back message bits for selected outgoing PCM channels from the outgoing to the incoming TDM parallel bit stream of a time-slot interchanger (506, 507, 508, 509 and 510 of Fig. 5) said method characterized by the steps of: storing the message bits for each incoming PCM channel from the incoming TDM parallel bit stream in an information memory (708 and 709 of Fig. 9) as addressed by sequential time slots; reading out from a routing memory (702 of Fig. 9) an ordered time slot and a loop-back control bit as addressed by the sequential time slots; reading out from the information memory (708 and 709 of Fig. 9) the stored message bits as addressed by the read-out ordered time slots from the routing memory (702 of Fig. 9); multiplexing (710 of Fig. 9) the read-out message bits for the outgoing TDM parallel bit stream in accordance with the sequential time slots; and multiplexing (601 and 609 of Fig. 8) the read- out message bits for the outgoing PCM channels into the incoming parallel TDM bit stream in accordance with sequential time slots when the corresponding read-out loopback control bit (605 of Fig. 8) has a logical one state.

Claim 21

A method for looping back message bits for selected outgoing PCM channels from the outgoing to the incoming TDM parallel bit stream of a time-slot interchanger (506, 507, 508, 509 and 510 of Fig. 5) said method characterized by the steps of: storing the message bits for each incoming PCM channel from the incoming TDM parallel bit stream in an information memory (708 and 709 of Fig. 9) as addressed by sequential time slots; reading out from a routing memory (702 of Fig. 9) an ordered time slot and a loop-back control bit as addressed by the sequential time slots; reading out from the information memory (708 and 709 of Fig. 9) the stored message bits as addressed by the read-out ordered time slots from the routing memory (702 of Fig. 9); multiplexing (710 of Fig. 9) the read-out message bits for the outgoing TDM parallel bit stream in accordance with the sequential time slots; and multiplexing (601 and 609 of Fig. 8) the read- out message bits for the outgoing PCM channels into the incoming parallel TDM bit stream in accordance with sequential time slots when the corresponding read-out loopback control bit (605 of Fig. 8) has a logical one state.