Circuit arrangement for monitoring an input voltage

Abstract

Abstract 1. A circuit arrangement for monitoring an input voltage (UE), wherein an operating voltage (UB), which is buffered in an energy store (G), is produced from the input voltage (UE) for a control circuit (S) which is at least partly composed of digital switching circuits and wherein the input voltage (UE) is supplied to a sensor (F) to which a time element (Z1, Z2) is connected and which emits an alarm signal (M) if the input voltage (UE) is smaller than a predetermined threshold value (US), characterised in that the time element (Z1, Z2) is formed by a first time stage (Z1) and by a second time stage (Z2), that upon the pick-up of the alarm signal (M), the first time stage (Z1) emits a signal (S1) to the control circuit (S), which signal sets a rest position in the control circuit, in which rest position particularly little energy is required if the duration of the alarm signal (M) is greater than a predetermined first time duration (VI) and which rest position the control circuit (S1) itself leaves when said one signal (S1) has disappeared and continues the functions started before the setting into the rest position, and that the second time stage (Z2) switches off the operating voltage (UB) if the duration of the alarm signal (M) is greater than a predetermined second time duration (V2) which exceeds the first time duration (V1).

Inventors

• 👤 Torsten Dipl.-Ing. 8023 Pullach Vogeler

Bibliographic Details