Thermally enhanced integrated circuit carrier package

Claim 1

The embodiments of the invention in which an exclusive property or priviledge is claimed are defined as follows: 1. A thermally enhanced integrated circuit carier package comprising; a mass of thermally conductive spheroids fused into form which generally describes a protrusion of multiple fused spheroidal submasses generally perpendicular and intrinsic to an additional submass defined as a base such that said protrusions generally assume a thin prismatic fin-like form with an orientation diagonal to a principle leading edge; a means of attaching a flat plate of generally identical conductive material parallel to said base generally by first machining said base flat and then fusing said plate to said base; a means of affixing such assembly to an intermediate structure which secures the electrical array generally through the application of a thin layer of thermal adhesive; an intermediate structure of thermally conductive and electrically non-conductive material with non-porous attributes to seal out environmental penetrations with a generally thin central cross-section upon which singular or multiple semiconductor die(s) may be affixed by adhesive or other means; an electrical array of conductive traces generally plated or other vise deposited onto the intermediate structure such that electrically conductive traces originate from the periphery of the semiconductor die(s) outward to the periphery of said intermediate structure; a means of completing the electrical connections of the semiconductor die(s) to the electrical array generally by welding a short wirebond between the signal pads on said semiconductor die(s) to the adjacent peripheral terminal points of the electrical array, a principle carrier structure of thermally conductive and electrically non-conductive material with a central space or opening allowing access to the semiconductor die(s) and their associated electrical network terminations and including an array of contact pins coordinately located about the periphery of this principle carrier structure and protruding generally perpendicular relative to the electrical trace array through electrically inert material (generally that of the principle carrier material) and as such allowing a complete signal path from these pins to the semiconductor die(s) when the internal end-points of these contact pins are positioned sumarily upon the electrical array terminations of the intermediate assembly and maintained by means such as electrically non-conductive adhesive between such intermediate structure and said principle carrier structure; a coverplate which is generally metallic and affixed generally by adhesive to the principle carrier structure in the location of the semiconductor circuit(s) and terminal access space thus sealing out environmental penetrations and maintaining the required internal atmostphere.