Processor interconnection system

Claim 2

A multiprocessor computer system having n processors each of said n processors having associated therewith a plurality of resources, wherein said multiprocessor computer system includes: n local bus means associated on a one-to-one basis with said n processors, wherein each of said n local bus means connects said plurality of resources to said associated processor; and CHARACTERIZED IN THAT said computer system includes: intercommunication means connected to and interconnecting all of said n processors and said n local bus means and responsive to a requesting one of said n processors associated with another selected one of said n processors for directly connecting said requesting processor to said requested resource via the local bus connected to said requested resource.

Claim 3

The system of claim 1 CHARACTERIZED IN THAT said intercommunication means includes: global bus means connected to and interconnecting all of said n processors and all of said n local bus means for bidirectionally transmitting data, address and control signals between said requesting processors and said local bus means connected to said requested resource; and n memory management means associated on a one-to-one basis with each of said n processors, wherein each of said memory management means is responsive to said requesting processor requesting access to a resource connected to a local bus associated with another processor for directly connecting said requesting processor to said global bus means and each of said memory management means is further responsive to said requesting processor requesting access to a resource connected to said associated local bus means for directly connecting said requesting processor to said associated local bus means.

Claim 4

The system of claim 2, CHARACTERIZED IN THAT each of said n memory management means is responsive to a virtual memory address generated by said requesting processor for mapping said virtual memory address into a resource address; said system further includes: means (SELECT) in said memory management means responsive to a resource address which identifies a resource not connected to said associated local bus means for generating a global bus means request; priority arbiter means connected to all of said n processors and responsive to said global bus means request when said global bus means is idle and for applying a bus access signal to said memory management means generating said global bus means request; and wherein said last mentioned memory management means is responsive to said bus access signal for addressing said selected resource by applying said resource address to said selected local bus means via said global bus means.

Claim 5

The system of claim 2, CHARACTERIZED IN THAT said intercommunication means includes: n bus interface means associated on a one-to-one basis with said n processors wherein each of said n bus interface means is responsive to a resource address on said global bus means which identifies a resource connected to said associated local bus means for directly connecting said global bus means with said local bus means associated with said selected processor.

Claim 6

The system of claim 4, CHARACTERIZED IN THAT said interface means includes: local arbiter means responsive to the application of said resource address to said global bus means by said requesting memory management means for comparing said resource address to the addresses of the resources connected to said associated local bus means and for generating a receive enable signal when said resource address matches the address of one of said plurality of resources connected to said local bus means; and bus connect means connected to and interconnecting said global bus means and said associated local bus means and responsive to said receive enable signal for directly connecting said global bus means to said associated local bus means.

Claim 7

A multiprocessor computer system having n processor modules, wherein each of said n processor modules has associated therewith a plurality of resources, which resources are connected to an associated processor by a dedicated local bus means, CHARACTERIZED IN THAT said multiprocessor computer system includes a processor module interconnection means comprising; global bus means connected to all of said n processor modules for bidirectionally transmitting data, address and control signals among said n processor modules, n memory management means associated on a one-to-one basis with said n processor modules, each of said memory management means is responsive to a resource access request by said associated processor for switchably connecting said associated processor to said local bus means when said resource access request identifies one of said associated resources and for generating a global bus means access signal when said resource access request identifies a resource connected to another of said local bus means, priority arbiter means connected to said n processor modules and responsive to said global bus means access signal for enabling said memory management means to directly connect said requesting processor to said global bus means when said global bus means is idle; and n bus interface means associated on a one-to-one basis with said n processor modules, each of said n bus interface means is responsive to said requesting processor identifying said resource for directly connecting said associated local bus means to said global bus means.

Claim 8

A multiprocessor computer system having n processor modules, wherein each of said n processor modules has associated therewith a plurality of resources, which resources are connected to an associated processor by a dedicated local bus means, CHARACTERIZED IN THAT said multiprocessor computer system includes a processor module interconnection means comprising; global bus means connected to all of said n processor modules for bidirectionally transmitting data, address and control signals among said n processor modules, n memory management means associated on a one-to-one basis with said n processor modules, each of said memory management means is responsive to a resource access request by said associated processor for switchably connecting said associated processor to said local bus means when said resource access request identifies one of said associated resources and for generating a global bus means access signal when said resource access request identifies a resource connected to another of said local bus means, priority arbiter means connected to said n processor modules and responsive to said global bus means access signal for enabling said memory management means to directly connect said requesting processor to said global bus means when said global bus means is idle; and n bus interface means associated on a one-to-one basis with said n processor modules, each of said n bus interface means is responsive to said requesting processor identifying said resource for directly connecting said associated local bus means to said global bus means.

Claim 9

The system of claim 6 CHARACTERIZED IN THAT said memory management means is responsive to said global bus means enable signal for applying the address of said resource addressed by said associated processor to said global bus means; wherein said bus interface means includes: local arbiter means responsive to the application of a resource address to said global bus means for comparing said resource address to the addresses of the resources assigned to that processor module and if the two addresses match, generating a module selected signal; and bus connect means responsive to said module selected signal for interconnecting said local bus means to said global bus means, thereby providing said requesting processor with direct access to said resource addressed by said associated processor.

Claim 10

A hierarchical multiprocessor computer system having n processors wherein said n processors are divided into a plurality of groups with each of said groups having associated therewith resources, CHARACTERIZED IN THAT each group of said hierarchical multiprocessor computer system includes: a number of local bus means equal in number to the processors in said group and associated on a one-to-one basis with said n processors, wherein each of said n local bus means connects resources associated with said processor to said associated processor; intercommunication means connected to all of said n processors and said n local bus means for directly connecting a requesting one of said n processors to the resources requested by said requesting processor via the local bus means connected to said resources requested wherein said resources requested are associated with another selected one of said n processors; and wherein said hierarchical multiprocessor computer system includes: global intercommunication means connected to all of said plurality of groups, wherein said global intercommunication means directly connects any requesting one of said n processor in a first of said plurality of groups with the resources associated with a selected one of said n processors in a second of said plurality of groups of processors via said intercommunication means in both said first and said second groups of processor and via said local bus means associated with said requested resources.

Claim 11

A hierarchical multiprocessor computer system having n processors wherein said n processors are divided into a plurality of groups with each of said groups having associated therewith resources, CHARACTERIZED IN THAT each group of said hierarchical multiprocessor computer system includes: a number of local bus means equal in number to the processors in said group and associated on a one-to-one basis with said n processors, wherein each of said n local bus means connects resources associated with said processor to said associated processor; intercommunication means connected to all of said n processors and said n local bus means for directly connecting a requesting one of said n processors to the resources requested by said requesting processor via the local bus means connected to said resources requested wherein said resources requested are associated with another selected one of said n processors; and wherein said hierarchical multiprocessor computer system includes: global intercommunication means connected to all of said plurality of groups, wherein said global intercommunication means directly connects any requesting one of said n processor in a first of said plurality of groups with the resources associated with a selected one of said n processors in a second of said plurality of groups of processors via said intercommunication means in both said first and said second groups of processor and via said local bus means associated with said requested resources.