← Back to Patent Explorer
CA1174364A Expired / Lapsed CA ⏱️ 0.0 years remaining

Apparatus for providing a histogram in a real time of the separation times between electronic signals

Assignee: Individual
•
Filing: 1981-08-07
•
Granted: 1984-09-11
•
Expires: 2001-08-07
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract ABSTRACT Apparatus for obtaining a histogram of the separation time between successive events. The apparatus is comprised of a time base (3) whose output is connected to a first set of decade counters (5.1 to 5.X) which are each associated with the detection means of the counter that keeps track of the state of the counter which counts and which has not yet overflowed, a corresponding set of AND gates (10.1 to 10.X) each with an input connected to the output of the corresponding detection means (5.1 to 5.X) and the other input connected to the source of events (2). The CLR input of the detection means is connected to the source (2), through a delay circuit (6). The output of each AND gate (10.1 to 10.X) is connected to a second set of decade counters (111.1 to 11X.1), each associated with a memory. A timer (4) has its input connected to the time base (3) and its output to the transfer control means of the contents of each counter of the second set (111.1 to 11X.1) to its associated memory. Reading means (12.1 to 12.X) read the contents of the memories to a recording apparatus. A second delay circuit (9) has its input connected to the output of timer (4) and its output to the CLR inputs of the counters. The reading means is comprised of a set of multiplexers whose inputs are selectively connected to the outputs of the memories.

Inventors

  • 👤 Michel Urien
  • 👤 Guy M.P.J. Theron

Bibliographic Details

Application Number —
Jurisdiction CA
Data Source google_patents
Last Synchronized 2026-10-30 23:45
CPC Classifications
A; A61; A61B; A61B5/00; A61B5/02; A61B5/024; G; G01; G01R; G01R29/00; G01R29/02; G01R29/027; G01R29/033; G07; G07C; G07C1/00

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 197 words
Apparatus for obtaining a histogram of the separation time between successive events characterized in that it is comprised of a time base whose output is connected to a first set of decade counters which are each associated with the detection means of the counter which keeps track of the state of the counter which counts and which has not yet overflowed, a corresponding set of AND gates each having an input connected to the output of the corresponding detection means and the other input connected to the source of events, the CLR input of the detection means also connected to said source, through a delay circuit, the output of each AND gate being connected to a second set of decade counters, each associated with a memory, a timer whose input is connected to the time base and whose output is connected to control means to transfer the contents of each counter of the second set to its associated memory, means for reading the contents of the memories to a recording apparatus, a second delay circuit whose input is connected to the output of the timer and whose output is connected to the CLR inputs of the counters.
Claim 2
Dependent Claim 197 words
Apparatus for obtaining a histogram of the separation time between successive events characterized in that it is comprised of a time base whose output is connected to a first set of decade counters which are each associated with the detection means of the counter which keeps track of the state of the counter which counts and which has not yet overflowed, a corresponding set of AND gates each having an input connected to the output of the corresponding detection means and the other input connected to the source of events, the CLR input of the detection means also connected to said source, through a delay circuit, the output of each AND gate being connected to a second set of decade counters, each associated with a memory, a timer whose input is connected to the time base and whose output is connected to control means to transfer the contents of each counter of the second set to its associated memory, means for reading the contents of the memories to a recording apparatus, a second delay circuit whose input is connected to the output of the timer and whose output is connected to the CLR inputs of the counters.
Claim 3
Dependent Claim 66 words
Apparatus according to claim 1, characterized in that said reading means are comprised of a set of multiplexers whose inputs are selectively connected to the outputs of said memories under the command of a control circuit having a timing circuit whose output is connected in parallel to the control inputs of the multiplexers and whose input is connected to the output of the second delay circuit.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Maintenance schedule is calculated for granted US utility patents.

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag