CA1106980A — Cellular integrated circuit and hierarchical meth…

Claim 1

Independent Claim 282 words

In a cellular integrated circuit, a semiconductor body having a surface, a rectangular grid pattern formed on the surface of the body and being defined by grid lines exten-ding at right angles to each other along X and Y axes, a plu-rality of basic cells formed in the semiconductor body, each of the basic cells having a plurality of active elements therein, each of said basic cells being selected from basic cells of a limited number of different designs, each of the basic cells being disposed within a rectangular area which is no greater than a predetermined size and overlying a plurality of grid lines on both the X and Y axes so that each basic cell overlies a plurality of intersections of grid lines which define predetermined grid points, each basic cell including a power bus, a ground bus, an input lead and an output connected to the basic cell and having a predetermined arrangement with respect to certain grid points, the improvement wherein there is provided a first group of leads carried by said semiconductor body for interconnecting said basic cells to form a plurality of unit cells, each of said unit cells being larger than each of said basic cells, each of said unit cells being disposed in a second rectangular area, a second group of leads carried by said semiconductor body for interconnecting said unit cells into a plurality of functional blocks, each of said functional blocks being larger than each of said unit blocks, each of said functional blocks being disposed in a third rectangular area, and a third group of leads carried by said semiconductor body for interconnecting said functional blocks into an integrated circuit system.

Claim 2

Dependent Claim 282 words

In a cellular integrated circuit, a semiconductor body having a surface, a rectangular grid pattern formed on the surface of the body and being defined by grid lines exten-ding at right angles to each other along X and Y axes, a plu-rality of basic cells formed in the semiconductor body, each of the basic cells having a plurality of active elements therein, each of said basic cells being selected from basic cells of a limited number of different designs, each of the basic cells being disposed within a rectangular area which is no greater than a predetermined size and overlying a plurality of grid lines on both the X and Y axes so that each basic cell overlies a plurality of intersections of grid lines which define predetermined grid points, each basic cell including a power bus, a ground bus, an input lead and an output connected to the basic cell and having a predetermined arrangement with respect to certain grid points, the improvement wherein there is provided a first group of leads carried by said semiconductor body for interconnecting said basic cells to form a plurality of unit cells, each of said unit cells being larger than each of said basic cells, each of said unit cells being disposed in a second rectangular area, a second group of leads carried by said semiconductor body for interconnecting said unit cells into a plurality of functional blocks, each of said functional blocks being larger than each of said unit blocks, each of said functional blocks being disposed in a third rectangular area, and a third group of leads carried by said semiconductor body for interconnecting said functional blocks into an integrated circuit system.

Claim 3

Dependent Claim 39 words

A cellular integrated circuit as in claim 1 wherein said output of each basic cell is disposed within the rec-tangular area of each basic cell in a region which is remote from the outer perimeter of the rectangular area.

Claim 4

Dependent Claim 38 words

A cellular integrated circuit as in claim 1 wherein at least certain of the basic cells are of the same design but have patterns which are flipped around an X or a Y axis of the basic cells.

Claim 5

Dependent Claim 250 words

In a method for forming a cellular integrated cir-cuit upon the surface of the semiconductor body by the use of a rectangular grid pattern which is defined by lines extending at right angles to each other along X and Y axes, designing a limited number of basic cells with each basic cell being of a different design and with each basic cell having a plurality of active elements therein, designing each basic cell so that it occupies a rectangular area on the rectangular pattern which is no greater than a predetermined size, designing each basic cell so that it overlies a plurality of grid lines on both the X and Y axes of the rectangular grid pattern and overlies a plurality of intersections of the grid lines which define predetermined grid points within the rectangular area, designing each basic cell so that it includes a power bus, a ground bus, an input lead and an output which are connected to the active elements in the basic cell and which are in registration with certain grid points within the rectangular area for the basic cell, forming selected basic cells on the semiconductor body, forming the power bus, the ground bus, the input leads and the output for the basic cells on the semiconductor body, forming interconnections on the semiconductor body to interconnect the basic cells into larger integrated circuits in the form of unit cells, and forming additional interconnections on the semiconductor body to form the unit cells into functional blocks.

Claim 6

Dependent Claim 250 words

In a method for forming a cellular integrated cir-cuit upon the surface of the semiconductor body by the use of a rectangular grid pattern which is defined by lines extending at right angles to each other along X and Y axes, designing a limited number of basic cells with each basic cell being of a different design and with each basic cell having a plurality of active elements therein, designing each basic cell so that it occupies a rectangular area on the rectangular pattern which is no greater than a predetermined size, designing each basic cell so that it overlies a plurality of grid lines on both the X and Y axes of the rectangular grid pattern and overlies a plurality of intersections of the grid lines which define predetermined grid points within the rectangular area, designing each basic cell so that it includes a power bus, a ground bus, an input lead and an output which are connected to the active elements in the basic cell and which are in registration with certain grid points within the rectangular area for the basic cell, forming selected basic cells on the semiconductor body, forming the power bus, the ground bus, the input leads and the output for the basic cells on the semiconductor body, forming interconnections on the semiconductor body to interconnect the basic cells into larger integrated circuits in the form of unit cells, and forming additional interconnections on the semiconductor body to form the unit cells into functional blocks.

Claim 7

Dependent Claim 24 words

A method as in claim 4 wherein at least certain of the basic cells are flipped about either an X or a Y axis.

Claim 8

Dependent Claim 36 words

A method as in claim 4 wherein a plurality of FB's are provided together with the step of forming additional interconnections on the semiconductor body to interconnect the functional blocks into a large integrated circuit system.

Claim 9

Dependent Claim 15 words

A method as in claim 4 wherein the limited number of basic cells is 7.

Claim 10

Dependent Claim 161 words

The integrated circuit as in claim 1 wherein said basic cells are formed in the semiconductor body in spaced apart areas on said surface, and wherein there is provided an insulating layer formed on said surface and overlying said basic cells, said power bus and said ground bus being carried by said insulating layer in a spaced apart parallel relation-ship, said input lead being carried by said insulating material and crossing said power bus and said ground bus to form intersections therewith, said input lead and said power and ground buses extending at right angles with respect to each other, said basic cells, said power bus, and said ground bus being arranged so that at least one intersection overlies each basic cell, said output lead being carried by said insulating layer and conducting means extending from each basic cell through the insulating layer and making electrical connections between said power bus, said ground bus, said input lead and said output lead.

Claim 11

Dependent Claim 27 words

An integrated circuit as in claim 8 wherein a plurality of input leads are provided and wherein said input leads are arranged in a spaced parallel relationship.

Claim 12

Dependent Claim 32 words

An integrated circuit as in claim 8 together with interconnecting leads formed on and carried by said insulating layer and serving to interconnect said basic cells to form a larger integrated circuit.

Claim 13

Dependent Claim 16 words

An integrated circuit as in claim 8 wherein said input leads are comprised of polycrystalline silicon.

Claim 14

Dependent Claim 18 words

An integrated circuit as in claim 8 wherein said basic cell is formed of a complementary MOS circuit.

Claim 15

Dependent Claim 51 words

An integrated circuit as in claim 8 together with at least one additional ground bus, at least one additional power bus, and at least one additional input lead, and wherein the power buses and the ground buses are parallel to each other and the input leads are parallel to each other.

Claim 16

Dependent Claim 47 words

An integrated circuit as in claim 8 wherein the semiconductor body is of the N type and is provided with a P-type well formed therein and wherein at least portions of at least two basic cells are disposed in said P-type well and share said P-type well.

Claim 17

Dependent Claim 154 words

The integrated circuit as in claim 1 wherein said basic cells are formed in the semiconductor body in spaced apart areas on said surface, and wherein there is provided an insulating layer formed on said surface and overlying said basic cells, said power bus and said ground bus being carried by said insulating layer and being in spaced apart parallel relationship with respect to each other, at least one input lead carried by said insulating layer and crossing said power bus and said ground bus to form intersections, said rectangular grid overlying said spaced apart areas, characterized in that each of said basic cells have contact pads which are positioned at predetermined Cartesian coordinates of said rectangular grid, at least one output lead connected to said basic cells and means forming conducting connections between said contact pads of said basic cells and said power bus, ground bus, said input lead and said output lead.

Claim 18

Dependent Claim 34 words

An integrated circuit as in claim 15 wherein said basic cells are selected from circuits comprising an inverted circuit, a NAND circuit, an AND-OR inverter circuit, a NOR circuit and a transmission gate circuit.

Claim 19

Dependent Claim 42 words

An integrated circuit as in claim 15 wherein at least two of the basic cells have a relationship such that one has an arrangement which is substantially identical to the other with the exception that its pattern has been flipped through 180°.

Claim 20

Dependent Claim 238 words

An integrated circuit as in claim 1 wherein said semiconductor body has its surface arrayed in a grid pattern defined by a plurality of parallel first grid lines spaced apart by a first dimension and extending parallel to a first axis and by a plurality of parallel second grid lines spaced apart by a second dimension and extending parallel to a second axis, said first and second axes intersecting at an angle whereby said first and second grid lines intersect to define grid points, said basic cells each having an area overlying a plurality of said grid points, each having first, second, and third regions for making electrical connections to the basic cell, each having first and second regions located to overlie first and second ones of said plurality of grid points, respectively, characterized in that each has said third region spaced from selected ones of said grid lines 50 as to be lo-cated not to overlie said grid points, an insulating layer formed on said surface to overlie said basic cells and having openings at selected grid points, first and second conductorscarried by said in-sulating layer, said first and second conductors colinear with first and second ones of said grid lines, respectively, said first and second conductors extending to overlie said first and second ones of said plurality of grid points,-respectively, and to connect through openings in said insulating layer to said first and second regions, respectively.

Claim 21

Dependent Claim 52 words

The circuit structure of claim 18 wherein said first and second conductors are power and ground buses, respectively, parallel to said second axis, wherein said third region is an input region parallel to said first axis and wherein each of said basic cells include a fourth region for an electrical output connection.

Claim 22

Dependent Claim 53 words

The circuit structure of claim 19 wherein said fourth region overlies a selected grid point and where said structure further includes an additional conductor colinear with a grid line so as to overlie said selected grid point and connect through said insulating layer to contact said fourth region at said selected grid point.

Claim 23

Dependent Claim 49 words

The circuit structure of claim 19 wherein said third region for each of said basic cells is colinear with a line parallel to and spaced by a predetermined offset from selected ones of said grid lines parallel to said first axis, said predetermined offset less than said first dimension.

Claim 24

Dependent Claim 53 words

The circuit structure of claim 21 wherein each of said basic cells includes a plurality of additional regions parallel to said third region and spaced from said third region and spaced apart from each other by said first dimen-sion whereby none of said additional regions overlies any of said plurality of grid points.

Claim 25

Dependent Claim 12 words

The circuit structure of claim 18 wherein said angle is 90 degrees.

Cellular integrated circuit and hierarchical method

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